* Accidently overwrote info.registers which let all subsequent register writes
(in the kernel driver) fail - or crash the system. * Waiting for VBLANK now works as expected - you actually have to *set* the bit to clear it, isn't that obvious? :-) git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17443 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -223,6 +223,7 @@ struct intel_free_graphics_memory {
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#define DISPLAY_PIPE_ENABLED (1UL << 31)
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#define DISPLAY_PIPE_ENABLED (1UL << 31)
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#define INTEL_DISPLAY_PIPE_STATUS 0x70024
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#define INTEL_DISPLAY_PIPE_STATUS 0x70024
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#define DISPLAY_PIPE_VBLANK_ENABLED (1UL << 17)
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#define DISPLAY_PIPE_VBLANK_ENABLED (1UL << 17)
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#define DISPLAY_PIPE_VBLANK_STATUS (1UL << 1)
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#define INTEL_DISPLAY_PLL 0x06014
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#define INTEL_DISPLAY_PLL 0x06014
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#define INTEL_DISPLAY_PLL_DIVISOR_0 0x06040
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#define INTEL_DISPLAY_PLL_DIVISOR_0 0x06040
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@ -166,7 +166,7 @@ intel_interrupt_handler(void *data)
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{
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{
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intel_info &info = *(intel_info *)data;
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intel_info &info = *(intel_info *)data;
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uint32 identity = read32(info.registers + INTEL_INTERRUPT_IDENTITY);
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uint32 identity = read16(info.registers + INTEL_INTERRUPT_IDENTITY);
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if (identity == 0)
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if (identity == 0)
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return B_UNHANDLED_INTERRUPT;
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return B_UNHANDLED_INTERRUPT;
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@ -176,10 +176,12 @@ intel_interrupt_handler(void *data)
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handled = release_vblank_sem(info);
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handled = release_vblank_sem(info);
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// make sure we'll get another one of those
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// make sure we'll get another one of those
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write32(info.registers + INTEL_DISPLAY_PIPE_STATUS, DISPLAY_PIPE_VBLANK_ENABLED);
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write32(info.registers + INTEL_DISPLAY_PIPE_STATUS, DISPLAY_PIPE_VBLANK_STATUS);
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write32(info.registers + INTEL_INTERRUPT_IDENTITY, 0);
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}
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}
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// setting the bit clears it!
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write16(info.registers + INTEL_INTERRUPT_IDENTITY, identity);
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return handled;
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return handled;
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}
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}
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@ -209,15 +211,16 @@ init_interrupt_handler(intel_info &info)
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info.fake_interrupts = false;
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info.fake_interrupts = false;
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status = install_io_interrupt_handler(info.pci->u.h0.interrupt_line,
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status = install_io_interrupt_handler(info.pci->u.h0.interrupt_line,
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intel_interrupt_handler, (void *)&info, 0);
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&intel_interrupt_handler, (void *)&info, 0);
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if (status == B_OK) {
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if (status == B_OK) {
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// enable interrupts - we only want VBLANK interrupts
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// enable interrupts - we only want VBLANK interrupts
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write32(info.registers + INTEL_INTERRUPT_ENABLED, INTERRUPT_VBLANK);
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write16(info.registers + INTEL_INTERRUPT_ENABLED,
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write32(info.registers + INTEL_INTERRUPT_MASK, ~INTERRUPT_VBLANK);
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read16(info.registers + INTEL_INTERRUPT_ENABLED) | INTERRUPT_VBLANK);
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write16(info.registers + INTEL_INTERRUPT_MASK, ~INTERRUPT_VBLANK);
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write32(info.registers + INTEL_DISPLAY_PIPE_STATUS,
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write32(info.registers + INTEL_DISPLAY_PIPE_STATUS,
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DISPLAY_PIPE_VBLANK_ENABLED);
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DISPLAY_PIPE_VBLANK_STATUS);
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write32(info.registers + INTEL_INTERRUPT_IDENTITY, 0);
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write16(info.registers + INTEL_INTERRUPT_IDENTITY, ~0);
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}
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}
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}
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}
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if (status < B_OK) {
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if (status < B_OK) {
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@ -412,9 +415,10 @@ intel_extreme_init(intel_info &info)
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set_gtt_entry(info, totalSize, info.shared_info->physical_cursor_memory);
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set_gtt_entry(info, totalSize, info.shared_info->physical_cursor_memory);
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AreaKeeper cursorMapper;
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AreaKeeper cursorMapper;
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void *cursorMemory;
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info.cursor_area = cursorMapper.Map("intel extreme cursor",
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info.cursor_area = cursorMapper.Map("intel extreme cursor",
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(void *)(info.shared_info->physical_graphics_memory + totalSize),
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(void *)(info.shared_info->physical_graphics_memory + totalSize),
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B_PAGE_SIZE, B_ANY_KERNEL_ADDRESS, 0, (void **)&info.registers);
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B_PAGE_SIZE, B_ANY_KERNEL_ADDRESS, 0, &cursorMemory);
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if (cursorMapper.InitCheck() < B_OK) {
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if (cursorMapper.InitCheck() < B_OK) {
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// we can't do a hardware cursor, then...
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// we can't do a hardware cursor, then...
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}
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}
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@ -438,8 +442,8 @@ intel_extreme_uninit(intel_info &info)
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if (!info.fake_interrupts && info.shared_info->vblank_sem > 0) {
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if (!info.fake_interrupts && info.shared_info->vblank_sem > 0) {
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// disable interrupt generation
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// disable interrupt generation
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write32(info.registers + INTEL_INTERRUPT_ENABLED, 0);
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write16(info.registers + INTEL_INTERRUPT_ENABLED, 0);
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write32(info.registers + INTEL_INTERRUPT_MASK, ~0);
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write16(info.registers + INTEL_INTERRUPT_MASK, ~0);
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remove_io_interrupt_handler(info.pci->u.h0.interrupt_line,
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remove_io_interrupt_handler(info.pci->u.h0.interrupt_line,
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intel_interrupt_handler, &info);
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intel_interrupt_handler, &info);
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