* redesign code that locates AtomBIOS
allows for more flexible searching * check out shadow VGA bios as very last resort may cause issues but not a bad last resort compared to an app_server crash * better tracing git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42906 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV
parent
1ce29039cd
commit
62605d2824
@ -43,13 +43,77 @@
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#define RHD_MMIO_BAR 2
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inline bool
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isAtomBIOS(uint8* bios)
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status_t
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mapAtomBIOS(radeon_info &info, uint32 romBase, uint32 romSize)
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{
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uint16 bios_header = RADEON_BIOS16(bios, 0x48);
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TRACE("%s: seeking AtomBIOS @ 0x%" B_PRIX32 " [size: 0x%" B_PRIX32 "]\n",
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__func__, romBase, romSize);
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return !memcmp(&bios[bios_header + 4], "ATOM", 4) ||
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!memcmp(&bios[bios_header + 4], "MOTA", 4);
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uint8* rom;
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// attempt to access area specified
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area_id testArea = map_physical_memory("radeon hd rom probe",
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romBase, romSize, B_ANY_KERNEL_ADDRESS, B_READ_AREA,
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(void **)&rom);
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if (testArea < 0) {
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ERROR("%s: couldn't map potential rom @ 0x%" B_PRIX32
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"\n", __func__, romBase);
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return B_NO_MEMORY;
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}
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// check for valid BIOS signature
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if (rom[0] != 0x55 || rom[1] != 0xAA) {
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uint16 id = rom[0] + (rom[1] << 8);
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TRACE("%s: BIOS signature incorrect @ 0x%" B_PRIX32 " (%X)\n",
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__func__, romBase, id);
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delete_area(testArea);
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return B_ERROR;
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}
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// see if valid AtomBIOS rom
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uint16 romHeader = RADEON_BIOS16(rom, 0x48);
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bool romValid = !memcmp(&rom[romHeader + 4], "ATOM", 4)
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|| !memcmp(&rom[romHeader + 4], "MOTA", 4);
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if (romValid == false) {
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// FAIL : a PCI VGA bios but not AtomBIOS
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uint16 id = rom[0] + (rom[1] << 8);
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TRACE("%s: not AtomBIOS rom at 0x%" B_PRIX32 "(%X)\n",
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__func__, romBase, id);
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delete_area(testArea);
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return B_ERROR;
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}
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info.rom_area = create_area("radeon hd AtomBIOS",
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(void **)&info.atom_buffer, B_ANY_KERNEL_ADDRESS,
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romSize, B_NO_LOCK, B_READ_AREA | B_WRITE_AREA);
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if (info.rom_area < 0) {
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ERROR("%s: unable to map kernel AtomBIOS space!\n",
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__func__);
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delete_area(testArea);
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return B_NO_MEMORY;
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}
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memset((void*)info.atom_buffer, 0, romSize);
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// Prevent unknown code execution by AtomBIOS parser
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memcpy(info.atom_buffer, (void*)rom, romSize);
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// Copy AtomBIOS to kernel area
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// validate copied rom is valid
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romHeader = RADEON_BIOS16(info.atom_buffer, 0x48);
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romValid = !memcmp(&info.atom_buffer[romHeader + 4], "ATOM", 4)
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|| !memcmp(&info.atom_buffer[romHeader + 4], "MOTA", 4);
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if (romValid == true) {
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set_area_protection(info.rom_area, B_READ_AREA);
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ERROR("%s: AtomBIOS verified and locked\n", __func__);
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} else
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ERROR("%s: AtomBIOS memcpy failed!\n", __func__);
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delete_area(testArea);
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return romValid ? B_OK : B_ERROR;
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}
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@ -58,115 +122,77 @@ radeon_hd_getbios(radeon_info &info)
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{
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TRACE("card(%ld): %s: called\n", info.id, __func__);
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uint32 romBase;
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uint32 romSize;
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uint32 romConfig = 0;
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uint32 romBase = 0;
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uint32 romSize = 0;
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uint32 romMethod = 0;
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if ((info.chipsetFlags & CHIP_IGP) != 0) {
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// IGP chipsets don't have a PCI rom BAR.
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// On post, the bios puts a copy of the IGP
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// AtomBIOS at the start of the video ram
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romBase = info.pci->u.h0.base_registers[RHD_FB_BAR];
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romSize = 256 * 1024;
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// romSize an educated guess
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} else {
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// Enable ROM decoding for PCI bar rom
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romConfig = get_pci_config(info.pci, PCI_rom_base, 4);
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romConfig |= PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, romConfig);
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status_t mapResult = B_ERROR;
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uint32 flags = get_pci_config(info.pci, PCI_rom_base, 4);
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if (flags & PCI_rom_enable)
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TRACE("%s: PCI ROM decode enabled successfully\n", __func__);
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// first we try to find the AtomBIOS rom via various methods
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for (romMethod = 0; romMethod < 3; romMethod++) {
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switch(romMethod) {
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case 0:
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// TODO: *** New ACPI method
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ERROR("%s: ACPI ATRM AtomBIOS TODO\n", __func__);
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break;
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case 1:
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// *** Discreet card on IGP, check PCI BAR 0
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// On post, the bios puts a copy of the IGP
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// AtomBIOS at the start of the video ram
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romBase = info.pci->u.h0.base_registers[RHD_FB_BAR];
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romSize = 256 * 1024;
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romBase = info.pci->u.h0.rom_base;
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romSize = info.pci->u.h0.rom_size;
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if (romBase == 0) {
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TRACE("%s: no PCI rom, trying shadow rom\n", __func__);
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// ROM has been copied by BIOS
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romBase = 0xC0000;
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if (romSize == 0) {
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romSize = 0x7FFF;
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// A guess at maximum shadow bios size
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}
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}
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}
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TRACE("%s: seeking rom at 0x%" B_PRIX32 " [size: 0x%" B_PRIX32 "]\n",
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__func__, romBase, romSize);
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uint8* bios;
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status_t result = B_ERROR;
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if (romBase == 0 || romSize == 0) {
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// FAIL: we never found a base to work off of.
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ERROR("%s: no rom address located.\n", __func__);
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result = B_ERROR;
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} else {
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area_id rom_area = map_physical_memory("radeon hd rom",
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romBase, romSize, B_ANY_KERNEL_ADDRESS, B_READ_AREA,
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(void **)&bios);
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if (info.rom_area < B_OK) {
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// FAIL : rom area wasn't mapped for access
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ERROR("%s: failed to map rom\n", __func__);
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result = B_ERROR;
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} else {
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if (bios[0] != 0x55 || bios[1] != 0xAA) {
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// FAIL : not a PCI rom
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uint16 id = bios[0] + (bios[1] << 8);
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ERROR("%s: this isn't a PCI rom (%X)\n",
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__func__, id);
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result = B_ERROR;
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} else if (isAtomBIOS(bios)) {
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info.rom_area = create_area("radeon hd AtomBIOS",
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(void **)&info.atom_buffer, B_ANY_KERNEL_ADDRESS,
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romSize, B_NO_LOCK, B_READ_AREA | B_WRITE_AREA);
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if (info.rom_area < 0) {
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// FAIL : couldn't create kernel AtomBIOS area
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ERROR("%s: Error creating kernel"
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" AtomBIOS area!\n", __func__);
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result = B_ERROR;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No base found at PCI FB BAR\n", __func__);
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} else {
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memset((void*)info.atom_buffer, 0, romSize);
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// Prevent unknown code execution by AtomBIOS parser
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memcpy(info.atom_buffer, (void *)bios, romSize);
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// Copy AtomBIOS to kernel area
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if (isAtomBIOS(info.atom_buffer)) {
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// SUCCESS : bios copied and verified
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ERROR("%s: AtomBIOS mapped!\n", __func__);
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set_area_protection(info.rom_area, B_READ_AREA);
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// Lock it down
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result = B_OK;
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} else {
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// FAIL : bios didn't copy properly for some reason
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ERROR("%s: AtomBIOS not mapped!\n", __func__);
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result = B_ERROR;
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}
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mapResult = mapAtomBIOS(info, romBase, romSize);
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}
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} else {
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ERROR("%s: rom found wasn't identified"
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" as AtomBIOS!\n", __func__);
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result = B_ERROR;
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break;
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case 2:
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{
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// *** PCI ROM BAR
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// Enable ROM decoding for PCI BAR rom
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uint32 pciConfig = get_pci_config(info.pci, PCI_rom_base, 4);
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pciConfig |= PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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uint32 flags = get_pci_config(info.pci, PCI_rom_base, 4);
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if ((flags & PCI_rom_enable) != 0)
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TRACE("%s: PCI ROM decode enabled\n", __func__);
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romBase = info.pci->u.h0.rom_base;
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romSize = info.pci->u.h0.rom_size;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No base found at PCI ROM BAR\n", __func__);
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} else {
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mapResult = mapAtomBIOS(info, romBase, romSize);
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}
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// Disable ROM decoding
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pciConfig &= ~PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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break;
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}
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delete_area(rom_area);
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}
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if (mapResult == B_OK) {
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ERROR("%s: AtomBIOS found using active method %" B_PRIu32
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" at 0x%" B_PRIX32 "\n", __func__, romMethod, romBase);
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break;
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} else {
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ERROR("%s: AtomBIOS not found using active method %" B_PRIu32
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" at 0x%" B_PRIX32 "\n", __func__, romMethod, romBase);
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}
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}
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if ((info.chipsetFlags & CHIP_IGP) == 0) {
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// Disable ROM decoding
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romConfig &= ~PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, romConfig);
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}
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if (result == B_OK) {
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if (mapResult == B_OK) {
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info.shared_info->rom_phys = romBase;
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info.shared_info->rom_size = romSize;
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}
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} else
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ERROR("%s: Active AtomBIOS search failed.\n", __func__);
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return result;
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return mapResult;
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}
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@ -195,8 +221,37 @@ radeon_hd_getbios_ni(radeon_info &info)
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write32(info.registers + R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
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// try to grab the bios
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status_t result = radeon_hd_getbios(info);
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// try to grab the bios via PCI ROM bar
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// Enable ROM decoding for PCI BAR rom
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uint32 pciConfig = get_pci_config(info.pci, PCI_rom_base, 4);
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pciConfig |= PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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uint32 flags = get_pci_config(info.pci, PCI_rom_base, 4);
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if (flags & PCI_rom_enable)
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TRACE("%s: PCI ROM decode enabled\n", __func__);
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uint32 romBase = info.pci->u.h0.rom_base;
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uint32 romSize = info.pci->u.h0.rom_size;
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status_t result = B_OK;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No AtomBIOS found at PCI ROM BAR\n", __func__);
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result = B_ERROR;
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} else {
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result = mapAtomBIOS(info, romBase, romSize);
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}
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if (result == B_OK) {
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ERROR("%s: AtomBIOS found using disabled method at 0x%" B_PRIX32
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" [size: 0x%" B_PRIX32 "]\n", __func__, romBase, romSize);
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info.shared_info->rom_phys = romBase;
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info.shared_info->rom_size = romSize;
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}
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// Disable ROM decoding
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pciConfig &= ~PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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// restore regs
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write32(info.registers + R600_BUS_CNTL, bus_cntl);
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@ -238,8 +293,37 @@ radeon_hd_getbios_r700(radeon_info &info)
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write32(info.registers + R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
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// try to grab the bios
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status_t result = radeon_hd_getbios(info);
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// try to grab the bios via PCI ROM bar
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// Enable ROM decoding for PCI BAR rom
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uint32 pciConfig = get_pci_config(info.pci, PCI_rom_base, 4);
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pciConfig |= PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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uint32 flags = get_pci_config(info.pci, PCI_rom_base, 4);
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if (flags & PCI_rom_enable)
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TRACE("%s: PCI ROM decode enabled\n", __func__);
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uint32 romBase = info.pci->u.h0.rom_base;
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uint32 romSize = info.pci->u.h0.rom_size;
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status_t result = B_OK;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No AtomBIOS found at PCI ROM BAR\n", __func__);
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result = B_ERROR;
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} else {
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result = mapAtomBIOS(info, romBase, romSize);
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}
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if (result == B_OK) {
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ERROR("%s: AtomBIOS found using disabled method at 0x%" B_PRIX32
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" [size: 0x%" B_PRIX32 "]\n", __func__, romBase, romSize);
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info.shared_info->rom_phys = romBase;
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info.shared_info->rom_size = romSize;
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}
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// Disable ROM decoding
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pciConfig &= ~PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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// restore regs
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write32(info.registers + RADEON_VIPH_CONTROL, viph_control);
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@ -308,7 +392,37 @@ radeon_hd_getbios_r600(radeon_info &info)
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write32(info.registers + R600_LOWER_GPIO_ENABLE,
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(lower_gpio_enable | 0x400));
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status_t result = radeon_hd_getbios(info);
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// try to grab the bios via PCI ROM bar
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// Enable ROM decoding for PCI BAR rom
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uint32 pciConfig = get_pci_config(info.pci, PCI_rom_base, 4);
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pciConfig |= PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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uint32 flags = get_pci_config(info.pci, PCI_rom_base, 4);
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if (flags & PCI_rom_enable)
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TRACE("%s: PCI ROM decode enabled\n", __func__);
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uint32 romBase = info.pci->u.h0.rom_base;
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uint32 romSize = info.pci->u.h0.rom_size;
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status_t result = B_OK;
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if (romBase == 0 || romSize == 0) {
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ERROR("%s: No AtomBIOS found at PCI ROM BAR\n", __func__);
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result = B_ERROR;
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} else {
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result = mapAtomBIOS(info, romBase, romSize);
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}
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if (result == B_OK) {
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ERROR("%s: AtomBIOS found using disabled method at 0x%" B_PRIX32
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" [size: 0x%" B_PRIX32 "]\n", __func__, romBase, romSize);
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info.shared_info->rom_phys = romBase;
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info.shared_info->rom_size = romSize;
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}
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// Disable ROM decoding
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pciConfig &= ~PCI_rom_enable;
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set_pci_config(info.pci, PCI_rom_base, 4, pciConfig);
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// restore regs
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write32(info.registers + RADEON_VIPH_CONTROL, viph_control);
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@ -405,13 +519,11 @@ radeon_hd_init(radeon_info &info)
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= read32(info.registers + R6XX_CONFIG_FB_BASE);
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// *** AtomBIOS mapping
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// First we try an active bios read
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status_t biosStatus = radeon_hd_getbios(info);
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if (biosStatus != B_OK) {
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// If the active read fails, we do a disabled read
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// TODO : IGP read
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if (biosStatus != B_OK) {
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// If the active read fails, we try a disabled read
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if (info.device_chipset >= (RADEON_R1000 | 0x20))
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biosStatus = radeon_hd_getbios_ni(info);
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else if (info.device_chipset >= (RADEON_R700 | 0x70))
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@ -420,6 +532,26 @@ radeon_hd_init(radeon_info &info)
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biosStatus = radeon_hd_getbios_r600(info);
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}
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if (biosStatus != B_OK) {
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// *** very last resort, shadow bios VGA rom
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// This works as long as the primary card is what this driver
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// is loaded for. Multiple cards may pose the risk of loading
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// the wrong AtomBIOS for the wrong card.
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uint32 romBase = 0xC0000;
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uint32 romSize = 128 * 1024;
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// what happens when AtomBIOS goes over 128Kb?
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// A Radeon HD 6990 has a 128Kb AtomBIOS
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if (mapAtomBIOS(info, romBase, romSize) == B_OK) {
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ERROR("%s: fallback to shadow VGA rom\n", __func__);
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info.shared_info->rom_phys = romBase;
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info.shared_info->rom_size = romSize;
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biosStatus = B_OK;
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}
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}
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// Check if a valid AtomBIOS image was found.
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if (biosStatus != B_OK) {
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ERROR("%s: card (%ld): couldn't find AtomBIOS rom!\n",
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@ -50,7 +50,9 @@ struct radeon_info {
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};
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status_t mapAtomBIOS(radeon_info &info, uint32 romBase, uint32 romSize);
|
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extern status_t radeon_hd_init(radeon_info& info);
|
||||
extern void radeon_hd_uninit(radeon_info& info);
|
||||
|
||||
|
||||
#endif /* RADEON_RD_PRIVATE_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user