Change all references to "__INTEL__" to "__i386__".

They are functionally identical, but the former is a BeOS/Haiku-specfic
macro that we include in the compiler specs, and the latter is defined
by GCC.
This commit is contained in:
Augustin Cavalier 2019-03-30 16:54:01 -04:00
parent 1e60bdeab6
commit 5ffbe7d778
49 changed files with 91 additions and 91 deletions

View File

@ -18,7 +18,7 @@
__HAIKU_BIG_ENDIAN - defined to 1 on big endian architectures
(defaults to undefined)
*/
#if defined(__INTEL__)
#if defined(__i386__)
# define __HAIKU_ARCH x86
# if __GNUC__ == 2
# define __HAIKU_ARCH_ABI "x86_gcc2"

View File

@ -534,7 +534,7 @@ extern status_t get_cpu_info(uint32 firstCPU, uint32 cpuCount,
extern status_t get_cpu_topology_info(cpu_topology_node_info* topologyInfos,
uint32* topologyInfoCount);
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
typedef union {
struct {
uint32 max_eax;

View File

@ -24,7 +24,7 @@
#if defined(__x86_64__)
typedef struct x86_64_debug_cpu_state debug_cpu_state;
#elif defined(__INTEL__)
#elif defined(__i386__)
typedef struct x86_debug_cpu_state debug_cpu_state;
#elif defined(__POWERPC__)
typedef struct ppc_debug_cpu_state debug_cpu_state;

View File

@ -23,7 +23,7 @@ extern "C" {
extern int32 tls_allocate(void);
#if !_NO_INLINE_ASM && __INTEL__ && __GNUC__
#if !_NO_INLINE_ASM && __i386__ && __GNUC__
static inline void *
tls_get(int32 index)
@ -54,13 +54,13 @@ tls_set(int32 index, void *value)
: : "r" (index), "r" (value));
}
#else /* !_NO_INLINE_ASM && __INTEL__ && __GNUC__ */
#else /* !_NO_INLINE_ASM && __i386__ && __GNUC__ */
extern void *tls_get(int32 index);
extern void **tls_address(int32 index);
extern void tls_set(int32 index, void *value);
#endif /* !_NO_INLINE_ASM && __INTEL__ && __GNUC__ */
#endif /* !_NO_INLINE_ASM && __i386__ && __GNUC__ */
#ifdef __cplusplus
}

View File

@ -10,7 +10,7 @@
* Architecture-specific structure passed to signal handlers
*/
#if __INTEL__
#if __i386__
typedef struct packed_fp_stack {
unsigned char st0[10];
@ -146,6 +146,6 @@ struct vregs {
unsigned long ebx;
};
#endif /* __INTEL__ */
#endif /* __i386__ */
#endif /* _ARCH_SIGNAL_H_ */

View File

@ -1,7 +1,7 @@
#ifndef _FENV_H
#define _FENV_H
#if defined(__INTEL__)
#if defined(__i386__)
# include <arch/x86/fenv.h>
#elif defined(__x86_64__)
# include <arch/x86_64/fenv.h>

View File

@ -49,7 +49,7 @@ check_r5_compatibility()
if (!__gR5Compatibility)
return false;
#ifndef __INTEL__
#ifndef __i386__
return false;
#else

View File

@ -31,7 +31,7 @@ int32 get_rounded_cpu_speed(void);
#endif
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
/*! Tries to parse an Intel CPU ID string to match our usual naming scheme.
Note, this function is not thread safe, and must only be called once
at a time.
@ -182,7 +182,7 @@ get_cpu_vendor_string(enum cpu_vendor cpuVendor)
}
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
/*! Parameter 'name' needs to point to an allocated array of 49 characters. */
void
get_cpuid_model_string(char *name)
@ -237,21 +237,21 @@ get_cpuid_model_string(char *name)
}
}
}
#endif /* __INTEL__ || __x86_64__ */
#endif /* __i386__ || __x86_64__ */
static const char*
get_cpu_model_string(enum cpu_platform platform, enum cpu_vendor cpuVendor,
uint32 cpuModel)
{
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
char cpuidName[49];
#endif
(void)cpuVendor;
(void)cpuModel;
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
if (platform != B_CPU_x86 && platform != B_CPU_x86_64)
return NULL;

View File

@ -549,7 +549,7 @@ extern void _kern_clear_caches(void *address, size_t length,
extern bool _kern_cpu_enabled(int32 cpu);
extern status_t _kern_set_cpu_enabled(int32 cpu, bool enabled);
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
// our only x86 only syscall
extern status_t _kern_get_cpuid(cpuid_info *info, uint32 eax, uint32 cpu);
#endif

View File

@ -330,7 +330,7 @@ void Radeon_SendIndirectBuffer( accelerator_info *ai,
// (this code is a bit of a overkill - currently, only some WinChip/Cyrix
// CPU's support out-of-order writes, but we are prepared)
// TODO : Other Architectures? PowerPC?
#ifdef __INTEL__
#ifdef __i386__
__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
#endif
// make sure the motherboard chipset has flushed its write buffer by

View File

@ -586,7 +586,7 @@ PCI::~PCI()
status_t
PCI::_CreateVirtualBus(uint8 domain, uint8 bus, uint8 *virtualBus)
{
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
// IA32 doesn't use domains
if (domain)
@ -625,7 +625,7 @@ PCI::_CreateVirtualBus(uint8 domain, uint8 bus, uint8 *virtualBus)
status_t
PCI::ResolveVirtualBus(uint8 virtualBus, uint8 *domain, uint8 *bus)
{
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
// IA32 doesn't use domains
*bus = virtualBus;
@ -1467,7 +1467,7 @@ PCI::_RefreshDeviceInfo(PCIBus *bus)
for (PCIDev *dev = bus->child; dev; dev = dev->next) {
_ReadBasicInfo(dev);
_ReadHeaderInfo(dev);
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
pci_read_arch_info(dev);
#endif
if (dev->child)

View File

@ -15,7 +15,7 @@
#include "pci_controller.h"
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
#include "pci_arch_info.h"
#endif
@ -47,7 +47,7 @@ struct PCIDev {
uint8 device;
uint8 function;
pci_info info;
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
pci_arch_info arch_info;
#endif
};

View File

@ -159,7 +159,7 @@ static void
ati_fixup_ixp(PCI *pci, uint8 domain, uint8 bus, uint8 device, uint8 function,
uint16 deviceId)
{
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
/* ATI Technologies Inc, IXP chipset:
* This chipset seems broken, at least on my laptop I must force
* the timer IRQ trigger mode, else no interrupt comes in.

View File

@ -13,7 +13,7 @@
#include "pci.h"
#define PCI_VERBOSE 1
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
// enabling it makes the pci bus_manager binary about 1MB
// some other platforms have issues with floppy image size...
// TODO: Move this define to BuildSetup?

View File

@ -90,7 +90,7 @@ module_info *modules[] = {
(module_info *)&gPCIRootModule,
(module_info *)&gPCIDeviceModule,
(module_info *)&gPCILegacyDriverModule,
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
// add platforms when they provide an arch specific module
(module_info *)&gPCIArchModule,
#endif

View File

@ -89,7 +89,7 @@ static char pci_name[] = B_PCI_MODULE_NAME;
#define inb(p) (*pci->read_io_8)(p)
#define outb(p,v) (*pci->write_io_8)(p,v)
#ifdef __INTEL__
#ifdef __i386__
#define toLE(x) (x)
#define unLE(x) (x)
#else
@ -799,7 +799,7 @@ static BusLogic *create_cardinfo(int num, int iobase, int irq)
BusLogic *bl = (BusLogic *) malloc(sizeof(BusLogic));
#ifndef __INTEL__
#ifndef __i386__
i = map_physical_memory("bl_regs", iobase, 4096,
B_ANY_KERNEL_ADDRESS, B_READ_AREA | B_WRITE_AREA, &a);
iobase = (uint32) a;
@ -926,7 +926,7 @@ sim_install_buslogic(void)
if ((h.vendor_id == PCI_VENDOR_BUSLOGIC) &&
(h.device_id == PCI_DEVICE_MULTIMASTER)) {
#ifdef __INTEL__
#ifdef __i386__
iobase = h.u.h0.base_registers[0];
#else
iobase = h.u.h0.base_registers[1];

View File

@ -224,7 +224,7 @@ static status_t initGATT( GART_info *gart )
// back to real live - some chipsets have write buffers that
// proove all previous assumptions wrong
// (don't know whether this really helps though)
#if defined(__INTEL__)
#if defined(__i386__)
asm volatile ( "wbinvd" ::: "memory" );
#elif defined(__POWERPC__)
// TODO : icbi on PowerPC to flush instruction cache?

View File

@ -178,7 +178,7 @@ typedef struct etherpci_private {
#endif
#if 0
#if __INTEL__
#if __i386__
uint8 ether_inb(etherpci_private_t *device, uint32 offset) {
uint8 result;
@ -567,7 +567,7 @@ etherpci_min(etherpci_private_t *data, unsigned char *dst,
unsigned short word;
word = ether_inw(data, NE_DATA);
#if __INTEL__
#if __i386__
dst[i + 1] = word >> 8;
dst[i + 0] = word & 0xff;
#else
@ -628,7 +628,7 @@ again:
for (i = 0; i < len; i += 2) {
unsigned short word;
#if __INTEL__
#if __i386__
word = (src[i + 1] << 8) | src[i + 0];
#else
word = (src[i] << 8) | src[i + 1];
@ -1181,7 +1181,7 @@ enable_addressing(etherpci_private_t *data)
{
unsigned char cmd;
#if __INTEL__
#if __i386__
data->reg_base = data->pciInfo->u.h0.base_registers[0];
#else
uint32 base, size, offset;
@ -1532,7 +1532,7 @@ open_hook(const char *name, uint32 flags, void **cookie)
return B_NO_ERROR;
err2:
#if !__INTEL__
#if !__i386__
delete_area(data->ioarea);
#endif
err1:
@ -1624,7 +1624,7 @@ free_hook(void *_data)
ETHER_DEBUG(FUNCTION, data->debug, kDevName ": free dev=%p\n", data);
#if !__INTEL__
#if !__i386__
delete_area(data->ioarea);
#endif

View File

@ -136,7 +136,7 @@ dbg_printf(const char *format,...)
va_list args;
va_start(args, format);
// no vsnprintf() on PPC and in kernel
#if defined(__INTEL__) && USER
#if defined(__i386__) && USER
vsnprintf(buffer, sizeof(buffer) - 1, format, args);
#else
vsprintf(buffer, format, args);

View File

@ -136,7 +136,7 @@ dbg_printf(const char *format,...)
va_list args;
va_start(args, format);
// no vsnprintf() on PPC and in kernel
#if defined(__INTEL__) && USER
#if defined(__i386__) && USER
vsnprintf(buffer, sizeof(buffer) - 1, format, args);
#else
vsprintf(buffer, format, args);

View File

@ -308,7 +308,7 @@ dbg_printf(const char *format,...)
va_list args;
va_start(args, format);
// no vsnprintf() on PPC
#if defined(__INTEL__) && !_KERNEL_MODE
#if defined(__i386__) && !_KERNEL_MODE
vsnprintf(buffer, sizeof(buffer) - 1, format, args);
#else
vsprintf(buffer, format, args);

View File

@ -156,7 +156,7 @@ dbg_printf(const char *format,...)
va_list args;
va_start(args, format);
// no vsnprintf() on PPC and in kernel
#if defined(__INTEL__) && USER
#if defined(__i386__) && USER
vsnprintf(buffer, sizeof(buffer) - 1, format, args);
#else
vsprintf(buffer, format, args);

View File

@ -38,7 +38,7 @@ using std::nothrow;
#endif
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
# ifndef _USER_MODE
# define MBR_HEADER "MBR.h"
# include MBR_HEADER

View File

@ -306,7 +306,7 @@ dbg_printf(const char *format,...)
va_list args;
va_start(args, format);
// no vsnprintf() on PPC and in kernel
#if defined(__INTEL__) && USER
#if defined(__i386__) && USER
vsnprintf(buffer, sizeof(buffer) - 1, format, args);
#else
vsprintf(buffer, format, args);

View File

@ -49,7 +49,7 @@ do_nothing(void *buffer, size_t bytecount)
}
#if __INTEL__
#if __i386__
// #pragma mark - optimized for IA32 platform
@ -122,7 +122,7 @@ swap_int16(void *buffer, size_t bytecount)
}
#else // !__INTEL__
#else // !__i386__
// #pragma mark - generic versions

View File

@ -19,7 +19,7 @@ CPUCapabilities::~CPUCapabilities()
CPUCapabilities::CPUCapabilities()
{
#ifdef __INTEL__
#ifdef __i386__
setIntelCapabilities();
#endif

View File

@ -23,13 +23,13 @@ CPUCapabilities::~CPUCapabilities()
CPUCapabilities::CPUCapabilities()
: fCapabilities(0)
{
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
_SetIntelCapabilities();
#endif
}
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
void
CPUCapabilities::_SetIntelCapabilities()
{
@ -88,7 +88,7 @@ CPUCapabilities::_SetIntelCapabilities()
}
}
}
#endif // __INTEL__ || __x86_64__
#endif // __i386__ || __x86_64__
bool

View File

@ -35,9 +35,9 @@ public:
void PrintCapabilities();
private:
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
void _SetIntelCapabilities();
#endif // __INTEL__ || __x86_64__
#endif // __i386__ || __x86_64__
uint32 fCapabilities;
};

View File

@ -21,7 +21,7 @@ constrain(float& value, float min, float max)
value = max;
}
#ifdef __INTEL__
#ifdef __i386__
// constrain_int32_0_255_asm
inline int32

View File

@ -103,7 +103,7 @@ static const char* kLGPLv21 = B_TRANSLATE_MARK("GNU LGPL v2.1");
#if 0
static const char* kPublicDomain = B_TRANSLATE_MARK("Public Domain");
#endif
#ifdef __INTEL__
#ifdef __i386__
static const char* kIntel2xxxFirmware = B_TRANSLATE_MARK("Intel (2xxx firmware)");
static const char* kIntelFirmware = B_TRANSLATE_MARK("Intel (firmware)");
static const char* kMarvellFirmware = B_TRANSLATE_MARK("Marvell (firmware)");
@ -1324,7 +1324,7 @@ AboutView::_CreateCreditsView()
.SetLicense(kBSDTwoClause)
.SetURL("http://www.acme.com/software/thttpd/"));
#ifdef __INTEL__
#ifdef __i386__
// Udis86 copyrights
_AddPackageCredit(PackageCredit("Udis86")
.SetCopyright(B_TRANSLATE(COPYRIGHT_STRING "2002-2004 "

View File

@ -44,7 +44,7 @@ Int64Property::Clone() const
bool
Int64Property::SetValue(const char* value)
{
// TODO: atoll is defined for __INTEL__ only
// TODO: atoll is defined for __i386__ only
return SetValue(atoll(value));
}

View File

@ -137,7 +137,7 @@ dbg_printf(const char *format,...)
va_list args;
va_start(args, format);
// no vsnprintf() on PPC and in kernel
#if defined(__INTEL__) && USER
#if defined(__i386__) && USER
vsnprintf(buffer, sizeof(buffer) - 1, format, args);
#else
vsprintf(buffer, format, args);

View File

@ -126,7 +126,7 @@ NormalPulseView::DetermineVendorAndProcessor()
#if __POWERPC__
logo = PowerPCLogo;
#elif __INTEL__
#elif __i386__
uint32 topologyNodeCount = 0;
cpu_topology_node_info* topology = NULL;
@ -193,7 +193,7 @@ NormalPulseView::Draw(BRect rect)
// Processor picture
DrawBitmap(fCpuLogo, BPoint(10, 10));
#if __INTEL__
#if __i386__
// Do nothing in the case of non-Intel CPUs - they already have a logo
if (!fHasBrandLogo) {
SetDrawingMode(B_OP_OVER);

View File

@ -484,7 +484,7 @@ unsigned char PowerPCLogo[] = {
};
#endif
#if __INTEL__
#if __i386__
unsigned char IntelLogo[] = {
0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x0a,0x04,0x0b,0x04,0x0b,
0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0a,0x05,0x0a,0x05,0x0a,0x04,
@ -1112,7 +1112,7 @@ unsigned char AmdLogo[] = {
0x01,0x0b,0x01,0x0a,0x01,0x0b,0x01,0x15,0x15,0x16,0x15,0x15,0x15,
0x16,0x15
};
#endif // __INTEL__
#endif // __i386__
unsigned char BlankLogo[] = {
0x15,0x15,0x15,0x16,0x15,0x15,0x15,0x16,0x0a,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0a,0x05,0x0a,0x05,0x0a,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0a,0x05,0x0a,0x05,0x0a,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0b,0x04,0x0a,0x05,0x0a,0x05,0x15,0x15,0x15,0x16,0x15,0x15,0x15,0x16,

View File

@ -84,7 +84,7 @@ BrowserApp::BrowserApp()
fConsoleWindow(NULL),
fCookieWindow(NULL)
{
#ifdef __INTEL__
#ifdef __i386__
// First let's check SSE2 is available
cpuid_info info;
get_cpuid(&info, 1, 0);

View File

@ -35,7 +35,7 @@ extern "C" {
#endif
// bonefish: What was this needed for?
//#if __INTEL__
//#if __i386__
//# ifdef _BUILDING_RDEF
//# define _IMPEXP_RDEF __declspec(dllexport)
//# else

View File

@ -17,7 +17,7 @@
// TODO: -disable_cpu_sn option is not yet implemented
// TODO: most of this file should go into an architecture dependent source file
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
struct cache_description {
uint8 code;
@ -288,7 +288,7 @@ print_intel_cache_descriptors(enum cpu_vendor vendor, uint32 model,
}
#endif // __INTEL__ || __x86_64__
#endif // __i386__ || __x86_64__
static void
@ -354,7 +354,7 @@ print_level1_cache(uint32 reg, const char *name)
}
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
static void
print_cache_desc(int32 cpu)
@ -425,7 +425,7 @@ print_transmeta_features(uint32 features)
printf("\t\tFCMOV\n");
}
#endif // __INTEL__ || __x86_64__
#endif // __i386__ || __x86_64__
static void
@ -449,7 +449,7 @@ print_features(const char** table, uint32 features)
}
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
static void
print_processor_signature(enum cpu_vendor vendor, cpuid_info *info)
@ -481,7 +481,7 @@ print_processor_signature(enum cpu_vendor vendor, cpuid_info *info)
}
}
#endif // __INTEL__ || __x86_64__
#endif // __i386__ || __x86_64__
static void
@ -510,7 +510,7 @@ dump_platform(system_info *info)
}
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
static void
dump_cpu(enum cpu_vendor vendor, uint32 model, int32 cpu)
@ -661,7 +661,7 @@ dump_cpu(enum cpu_vendor vendor, uint32 model, int32 cpu)
putchar('\n');
}
#endif // __INTEL__ || __x86_64__
#endif // __i386__ || __x86_64__
static void
@ -717,10 +717,10 @@ dump_cpus(system_info *info)
cpuModel,
frequency / 1000000);
#if defined(__INTEL__) || defined(__x86_64__)
#if defined(__i386__) || defined(__x86_64__)
for (uint32 cpu = 0; cpu < info->cpu_count; cpu++)
dump_cpu(cpuVendor, cpuModel, cpu);
#endif // __INTEL__ || __x86_64__
#endif // __i386__ || __x86_64__
}

View File

@ -1030,7 +1030,7 @@ void version(__G)
#ifdef __POWERPC__
"(PowerPC)",
#else
# ifdef __INTEL__
# ifdef __i386__
"(x86)",
# else
"(unknown)", /* someday we may have other architectures... */

View File

@ -22,7 +22,7 @@ CalculateChecksum(const uint8 *buffer, int32 size)
uint32 temp = 0;
while (size > 3) {
#if defined(__INTEL__)
#if defined(__i386__)
sum += B_SWAP_INT32(*(int32 *)buffer);
#else
sum += *(int32 *)buffer;

View File

@ -154,7 +154,7 @@ ArchitectureX86::Init()
if (fAssemblyLanguage == NULL)
return B_NO_MEMORY;
#if defined(__INTEL__)
#if defined(__i386__)
// TODO: this needs to be determined/retrieved indirectly from the
// target host interface, as in the remote case the CPU features may
// differ from those of the local CPU.

View File

@ -118,7 +118,7 @@ uint32 gSIMDFlags = detect_simd();
static uint32
detect_simd()
{
#if __INTEL__
#if __i386__
// Only scan CPUs for which we are certain the SIMD flags are properly
// defined.
const char* vendorNames[] = {
@ -170,7 +170,7 @@ detect_simd()
systemSIMD &= cpuSIMD;
}
return systemSIMD;
#else // !__INTEL__
#else // !__i386__
return 0;
#endif
}

View File

@ -405,7 +405,7 @@ struct BilinearLowFilterRatio :
};
#ifdef __INTEL__
#ifdef __i386__
struct BilinearSimd : DrawBitmapBilinearOptimized<BilinearSimd> {
void DrawToClipRect(int32 xIndexL, int32 xIndexR, int32 y1, int32 y2)
@ -475,7 +475,7 @@ struct BilinearSimd : DrawBitmapBilinearOptimized<BilinearSimd> {
}
};
#endif // __INTEL__
#endif // __i386__
template<class ColorType, class DrawMode>
@ -626,7 +626,7 @@ struct DrawBitmapBilinear {
break;
}
#ifdef __INTEL__
#ifdef __i386__
case kUseSIMDVersion:
{
BilinearSimd bilinearPainter;
@ -634,7 +634,7 @@ struct DrawBitmapBilinear {
filterData);
break;
}
#endif // __INTEL__
#endif // __i386__
}
#ifdef FILTER_INFOS_ON_HEAP

View File

@ -136,7 +136,7 @@ dbg_printf(const char *format,...)
va_list args;
va_start(args, format);
// no vsnprintf() on PPC and in kernel
#if defined(__INTEL__) && USER
#if defined(__i386__) && USER
vsnprintf(buffer, sizeof(buffer) - 1, format, args);
#else
vsprintf(buffer, format, args);

View File

@ -106,7 +106,7 @@ arch_fill_topology_node(cpu_topology_node_info* node, int32 cpu)
{
switch (node->type) {
case B_TOPOLOGY_ROOT:
#if __INTEL__
#if __i386__
node->data.root.platform = B_CPU_x86;
#elif __x86_64__
node->data.root.platform = B_CPU_x86_64;

View File

@ -6670,7 +6670,7 @@ _user_get_memory_properties(team_id teamID, const void* address,
// #pragma mark -- compatibility
#if defined(__INTEL__) && B_HAIKU_PHYSICAL_BITS > 32
#if defined(__i386__) && B_HAIKU_PHYSICAL_BITS > 32
struct physical_entry_beos {
@ -6785,4 +6785,4 @@ DEFINE_LIBROOT_KERNEL_SYMBOL_VERSION("__create_area_haiku", "create_area@@",
"BASE");
#endif // defined(__INTEL__) && B_HAIKU_PHYSICAL_BITS > 32
#endif // defined(__i386__) && B_HAIKU_PHYSICAL_BITS > 32

View File

@ -93,7 +93,7 @@ ssize_t __printf_pad __P ((FILE *, char pad, int n)); /* In vfprintf.c. */
#if defined(__x86_64__) || defined(__INTEL__)
#if defined(__x86_64__) || defined(__i386__)
/* sysdeps/x86_64/fpu/printf_fphex.c */
@ -169,7 +169,7 @@ do { \
} \
} while (0)
#endif /* __x86_64__ || __INTEL__ */
#endif /* __x86_64__ || __i386__ */
int

View File

@ -147,7 +147,7 @@ add_address(void* address, size_t size)
{
block *b = (block *)address - 1;
#ifdef __INTEL__
#ifdef __i386__
// set call stack
struct stack_frame {
struct stack_frame* previous;

View File

@ -71,7 +71,7 @@ typedef struct {
Using the CPU native mode is faster than the C-standard
mode. Another crazy optimisation you shouldn't care too
much about (except if you're a crazy geek). */
#ifdef __INTEL__
#ifdef __i386__
#define ROUNDING 0.0
#else
#define ROUNDING 0.5

View File

@ -102,7 +102,7 @@ crash_assert()
}
#if __INTEL__
#if __i386__
static int
crash_int3()
@ -118,7 +118,7 @@ crash_protection()
return 0;
}
#endif // __INTEL__
#endif // __i386__
typedef int crash_function_t();
@ -159,12 +159,12 @@ get_crash_function(const char* mode)
return crash_debugger;
} else if (strcmp(mode, "assert") == 0) {
return crash_assert;
#if __INTEL__
#if __i386__
} else if (strcmp(mode, "int3") == 0) {
return crash_int3;
} else if (strcmp(mode, "protection") == 0) {
return crash_protection;
#endif // __INTEL__
#endif // __i386__
}
return NULL;