From 5f44fcce9fb1c01b24c6d828acb214f1610985f0 Mon Sep 17 00:00:00 2001
From: Alexander von Gluck IV <kallisti5@unixzen.com>
Date: Tue, 7 Aug 2012 07:24:42 -0500
Subject: [PATCH] radeon_hd: enable non-dp code to execute dpcd queries

* Check DPCD to properly choose TRAVIS DP panel mode
---
 .../accelerants/radeon_hd/displayport.cpp        |  4 ++--
 src/add-ons/accelerants/radeon_hd/displayport.h  |  3 +++
 src/add-ons/accelerants/radeon_hd/encoder.cpp    | 16 ++++++++++++----
 3 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/src/add-ons/accelerants/radeon_hd/displayport.cpp b/src/add-ons/accelerants/radeon_hd/displayport.cpp
index 4be5968480..2aff239213 100644
--- a/src/add-ons/accelerants/radeon_hd/displayport.cpp
+++ b/src/add-ons/accelerants/radeon_hd/displayport.cpp
@@ -160,14 +160,14 @@ dp_aux_read(uint32 hwPin, uint16 address,
 }
 
 
-static void
+void
 dpcd_reg_write(uint32 hwPin, uint16 address, uint8 value)
 {
 	dp_aux_write(hwPin, address, &value, 1, 0);
 }
 
 
-static uint8
+uint8
 dpcd_reg_read(uint32 hwPin, uint16 address)
 {
 	uint8 value = 0;
diff --git a/src/add-ons/accelerants/radeon_hd/displayport.h b/src/add-ons/accelerants/radeon_hd/displayport.h
index 4752dc22df..fa06dc6e74 100644
--- a/src/add-ons/accelerants/radeon_hd/displayport.h
+++ b/src/add-ons/accelerants/radeon_hd/displayport.h
@@ -22,6 +22,9 @@
 #define DP_TPS3_SUPPORTED (1 << 6) // Stored within MAX_LANE_COUNT
 
 
+uint8 dpcd_reg_read(uint32 hwPin, uint16 address);
+void dpcd_reg_write(uint32 hwPin, uint16 address, uint8 value);
+
 int dp_aux_write(uint32 hwPin, uint16 address, uint8* send,
 	uint8 sendBytes, uint8 delay);
 int dp_aux_read(uint32 hwPin, uint16 address, uint8* recv,
diff --git a/src/add-ons/accelerants/radeon_hd/encoder.cpp b/src/add-ons/accelerants/radeon_hd/encoder.cpp
index 932dccf642..9a0d0b418b 100644
--- a/src/add-ons/accelerants/radeon_hd/encoder.cpp
+++ b/src/add-ons/accelerants/radeon_hd/encoder.cpp
@@ -589,9 +589,17 @@ encoder_dig_setup(uint32 connectorIndex, uint32 pixelClock, int command)
 				panelMode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
 			else if (connector->encoderExternal.objectID
 				== ENCODER_OBJECT_ID_TRAVIS) {
-				TRACE("%s: TODO: Travis: read DP confg data, DP1 vs DP2 mode\n",
-					__func__);
-				panelMode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
+				dp_info* dp = &gConnector[connectorIndex]->dpInfo;
+				uint8 id[6];
+				int bit;
+				for (bit = 0; bit < 6; bit++)
+					id[bit] = dpcd_reg_read(dp->auxPin, 0x503 + bit);
+				if (id[0] == 0x73 && id[1] == 0x69 && id[2] == 0x76
+					&& id[3] == 0x61 && id[4] == 0x72 && id[5] == 0x54) {
+					panelMode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
+				} else {
+					panelMode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
+				}
 			} else {
 				panelMode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
 			}
@@ -1345,7 +1353,7 @@ transmitter_dig_setup(uint32 connectorIndex, uint32 pixelClock,
 					// DP PHY to be clocked from external src if possible
 					if (isDP && pll->dpExternalClock) {
 						// use external clock source
-						args.v3.acConfig.ucRefClkSource = 2;
+						args.v3.acConfig.ucRefClkSource = ATOM_DCPLL;
 					} else
 						args.v3.acConfig.ucRefClkSource = pll->id;