radeon_hd: Don't pass old pixel clock to encoder
* pll_set can make pixel clock adjustments. * Anything after pll_set should use encoder pll to ensure adjustments are picked up.
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d8ac7e28ee
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5e87e39562
@ -282,12 +282,16 @@ encoder_apply_quirks(uint8 crtcID)
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void
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encoder_mode_set(uint8 id, uint32 pixelClock)
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encoder_mode_set(uint8 crtcID)
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{
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TRACE("%s\n", __func__);
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radeon_shared_info &info = *gInfo->shared_info;
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uint32 connectorIndex = gDisplay[id]->connectorIndex;
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uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
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uint16 encoderFlags = gConnector[connectorIndex]->encoder.flags;
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pll_info* pll = &gConnector[connectorIndex]->encoder.pll;
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// Adjusted pixel clock (*NOT* original mode pixel clock)
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uint32 pixelClock = pll->pixelClock;
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switch (gConnector[connectorIndex]->encoder.objectID) {
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case ENCODER_OBJECT_ID_INTERNAL_DAC1:
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@ -367,7 +371,7 @@ encoder_mode_set(uint8 id, uint32 pixelClock)
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}
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}
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encoder_apply_quirks(id);
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encoder_apply_quirks(crtcID);
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}
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@ -17,7 +17,7 @@ void encoder_assign_crtc(uint8 crtcID);
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uint32 encoder_pick_dig(uint32 connectorIndex);
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void encoder_apply_quirks(uint8 crtcID);
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void encoder_mode_set(uint8 id, uint32 pixelClock);
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void encoder_mode_set(uint8 crtcID);
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status_t encoder_analog_setup(uint32 connectorIndex,
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uint32 pixelClock, int command);
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status_t encoder_digital_setup(uint32 connectorIndex,
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@ -193,7 +193,7 @@ radeon_set_display_mode(display_mode* mode)
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display_crtc_scale(id, mode);
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// *** encoder mode set
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encoder_mode_set(id, mode->timing.pixel_clock);
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encoder_mode_set(id);
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// *** CRT controler commit
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display_crtc_dpms(id, B_DPMS_ON);
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