some coldstart finetuning and yet another script command. mods not yet checked (so not yet run).
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8745 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -177,11 +177,19 @@ static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 in
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/* select colormode CRTC registers base adresses */
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NV_REG8(NV8_MISCW) = 0xcb;
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/* unknown.. */
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NV_REG8(NV8_VSE2) = 0x01;
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/* enable access to primary head */
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set_crtc_owner(0);
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/* unlock head's registers for R/W access */
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CRTCW(LOCK, 0x57);
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CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));
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/* disable RMA as it's not used */
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/* (RMA is the cmd register for the 32bit port in the GPU to access 32bit registers
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* and framebuffer via legacy ISA I/O space.) */
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CRTCW(RMA, 0x00);
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if (si->ps.secondary_head)
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{
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/* enable access to secondary head */
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@ -309,6 +317,8 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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/* execute */
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adress += 1;
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LOG(8,("cmd 'setup RAM config'\n"));
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//fixme: setup_ram_config is also used on NV11 (at least), which means the
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// routine should function differently there!
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if (exec) setup_ram_config(rom);
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break;
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case 0x65:
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@ -383,6 +393,36 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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adress += 1;
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break;
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case 0x69:
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*size -= 5;
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if (*size < 0)
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{
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LOG(8,("script size error, aborting!\n\n"));
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end = true;
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result = B_ERROR;
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break;
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}
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/* execute */
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adress += 1;
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reg = *((uint16*)(&(rom[adress])));
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adress += 2;
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and_out = *((uint8*)(&(rom[adress])));
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adress += 1;
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or_in = *((uint8*)(&(rom[adress])));
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adress += 1;
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LOG(8,("cmd 'RD 8bit ISA I/O REG $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n",
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reg, and_out, or_in));
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//fixme? this is for ISA I/O registers. Looks like they are in mapped range
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// as well (confirm or update code!)
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if (exec)
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{
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byte = NV_REG8(/*0x00601000 + */reg);
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byte &= (uint8)and_out;
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byte |= (uint8)or_in;
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NV_REG8(/*0x00601000 + */reg) = byte;
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}
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break;
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case 0x6e:
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*size -= 13;
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if (*size < 0)
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@ -479,17 +519,19 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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adress += 1;
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or_in = *((uint8*)(&(rom[adress])));
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adress += 1;
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LOG(8,("cmd 'RD 8bit indexed REG $%02x via $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n",
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LOG(8,("cmd 'RD 8bit indexed ISA I/O REG $%02x via $%04x, AND-out = $%02x, OR-in = $%02x, WR-bk'\n",
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index, reg, and_out, or_in));
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//fixme? this is for ISA I/O registers. Looks like they are in mapped range
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// as well (confirm or update code!)
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if (exec)
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{
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safe = NV_REG8(0x00601000 + reg);
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NV_REG8(0x00601000 + reg) = index;
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byte = NV_REG8(0x00601000 + reg + 1);
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safe = NV_REG8(/*0x00601000 + */reg);
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NV_REG8(/*0x00601000 + */reg) = index;
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byte = NV_REG8(/*0x00601000 + */reg + 1);
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byte &= (uint8)and_out;
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byte |= (uint8)or_in;
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NV_REG8(0x00601000 + reg + 1) = byte;
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NV_REG8(0x00601000 + reg) = safe;
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NV_REG8(/*0x00601000 + */reg + 1) = byte;
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NV_REG8(/*0x00601000 + */reg) = safe;
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}
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break;
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case 0x79:
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