ice1712: patch for initializing codec on delta1010.
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5a58211db2
commit
57d2f931e0
@ -263,7 +263,7 @@ ice1712_setup(ice1712 *ice)
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ice->CommLines.data_in = 0;
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ice->CommLines.data_out = DELTA66_DOUT;
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ice->CommLines.cs_mask = DELTA66_CLK | DELTA66_DOUT
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| DELTA66_CODEC_CS_0 | DELTA66_CODEC_CS_1;
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| DELTA66_CS_MASK;
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break;
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case ICE1712_SUBDEVICE_DELTA410 :
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case ICE1712_SUBDEVICE_AUDIOPHILE_2496 :
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@ -272,7 +272,7 @@ ice1712_setup(ice1712 *ice)
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ice->CommLines.data_in = AP2496_DIN;
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ice->CommLines.data_out = AP2496_DOUT;
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ice->CommLines.cs_mask = AP2496_CLK | AP2496_DIN
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| AP2496_DOUT | AP2496_SPDIF_CS | AP2496_CODEC_CS;
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| AP2496_DOUT | AP2496_CS_MASK;
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break;
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case ICE1712_SUBDEVICE_DELTA1010 :
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case ICE1712_SUBDEVICE_DELTA1010LT :
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@ -286,8 +286,8 @@ ice1712_setup(ice1712 *ice)
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ice->CommLines.clock = VX442_CLK;
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ice->CommLines.data_in = VX442_DIN;
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ice->CommLines.data_out = VX442_DOUT;
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ice->CommLines.cs_mask = VX442_SPDIF_CS | VX442_CODEC_CS_0
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| VX442_CODEC_CS_1;
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ice->CommLines.cs_mask = VX442_CLK | VX442_DIN | VX442_DOUT
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| VX442_CS_MASK;
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break;
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}
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@ -193,6 +193,7 @@ extern ice1712 cards[NUM_CARDS];
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#define DELTA66_CLK 0x20 // clock
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#define DELTA66_CODEC_CS_0 0x40 // AK4524 #0
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#define DELTA66_CODEC_CS_1 0x80 // AK4524 #1
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#define DELTA66_CS_MASK 0xD0 // Chip Select mask
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//For AudioPhile 2496 / Delta 410
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#define AP2496_CLK 0x02 // clock
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@ -200,6 +201,7 @@ extern ice1712 cards[NUM_CARDS];
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#define AP2496_DOUT 0x08 // data output
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#define AP2496_SPDIF_CS 0x10 // CS8427 chip select
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#define AP2496_CODEC_CS 0x20 // AK4528 chip select
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#define AP2496_CS_MASK 0x30 // Chip Select Mask
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//For Delta 1010 LT
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#define DELTA1010LT_CLK 0x02 // clock
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@ -210,7 +212,7 @@ extern ice1712 cards[NUM_CARDS];
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#define DELTA1010LT_CODEC_CS_2 0x20 // AK4524 #2
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#define DELTA1010LT_CODEC_CS_3 0x30 // AK4524 #3
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#define DELTA1010LT_SPDIF_CS 0x40 // CS8427
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#define DELTA1010LT_CS_NONE 0x50 // All CS deselected
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#define DELTA1010LT_CS_NONE 0x70 // All CS deselected
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//For VX442
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#define VX442_CLK 0x02 // clock
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@ -219,6 +221,7 @@ extern ice1712 cards[NUM_CARDS];
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#define VX442_SPDIF_CS 0x10 // CS8427
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#define VX442_CODEC_CS_0 0x20 // ?? #0
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#define VX442_CODEC_CS_1 0x40 // ?? #1
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#define VX442_CS_MASK 0x70 // Chip Select Mask
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#define GPIO_I2C_DELAY 5 //Clock Delay for writing
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//I2C data throw GPIO
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@ -16,16 +16,17 @@
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extern pci_module_info *pci;
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static void ak45xx_write_gpio(ice1712 *ice, uint8 reg_addr,
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uint8 data, uint8 chip_select);
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uint8 data, uint8 chip_select, uint8 invert_cs);
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static void cs84xx_write_gpio(ice1712 *ice, uint8 reg_addr,
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uint8 data, uint8 chip_select);
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uint8 data, uint8 chip_select, uint8 invert_cs);
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static uint8 ak45xx_read_gpio(ice1712 *ice, uint8 reg_addr,
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uint8 chip_select) {return 0;} //Unimplemented
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uint8 chip_select, uint8 invert_cs)
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{return 0;} //Unimplemented
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static uint8 cs84xx_read_gpio(ice1712 *ice, uint8 reg_addr,
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uint8 chip_select);
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uint8 chip_select, uint8 invert_cs);
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static void write_gpio_byte(ice1712 *ice, uint8 data, uint8 gpio_data);
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static uint8 read_gpio_byte(ice1712 *ice, uint8 gpio_data);
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@ -304,24 +305,28 @@ codec_write(ice1712 *ice, uint8 reg_addr, uint8 data)
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switch (ice->product) {
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case ICE1712_SUBDEVICE_DELTA66:
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case ICE1712_SUBDEVICE_DELTA44:
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ak45xx_write_gpio(ice, reg_addr, data, DELTA66_CODEC_CS_0);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA66_CODEC_CS_1);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA66_CODEC_CS_0, 0);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA66_CODEC_CS_1, 0);
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break;
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case ICE1712_SUBDEVICE_DELTA410:
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case ICE1712_SUBDEVICE_AUDIOPHILE_2496:
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case ICE1712_SUBDEVICE_DELTADIO2496:
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ak45xx_write_gpio(ice, reg_addr, data, AP2496_CODEC_CS);
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ak45xx_write_gpio(ice, reg_addr, data, AP2496_CODEC_CS, 0);
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break;
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case ICE1712_SUBDEVICE_DELTA1010:
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case ICE1712_SUBDEVICE_DELTA1010LT:
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_0);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_1);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_2);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_3);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_0,
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DELTA1010LT_CS_NONE);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_1,
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DELTA1010LT_CS_NONE);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_2,
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DELTA1010LT_CS_NONE);
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ak45xx_write_gpio(ice, reg_addr, data, DELTA1010LT_CODEC_CS_3,
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DELTA1010LT_CS_NONE);
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break;
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case ICE1712_SUBDEVICE_VX442:
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ak45xx_write_gpio(ice, reg_addr, data, VX442_CODEC_CS_0);
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ak45xx_write_gpio(ice, reg_addr, data, VX442_CODEC_CS_1);
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ak45xx_write_gpio(ice, reg_addr, data, VX442_CODEC_CS_0, 0);
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ak45xx_write_gpio(ice, reg_addr, data, VX442_CODEC_CS_1, 0);
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break;
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}
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}
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@ -340,15 +345,16 @@ spdif_write(ice1712 *ice, uint8 reg_addr, uint8 data)
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case ICE1712_SUBDEVICE_DELTA44:
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break;
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case ICE1712_SUBDEVICE_AUDIOPHILE_2496:
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cs84xx_write_gpio(ice, reg_addr, data, AP2496_SPDIF_CS);
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cs84xx_write_gpio(ice, reg_addr, data, AP2496_SPDIF_CS, 0);
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break;
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case ICE1712_SUBDEVICE_DELTA410:
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break;
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case ICE1712_SUBDEVICE_DELTA1010LT:
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cs84xx_write_gpio(ice, reg_addr, data, DELTA1010LT_SPDIF_CS);
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cs84xx_write_gpio(ice, reg_addr, data, DELTA1010LT_SPDIF_CS,
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DELTA1010LT_CS_NONE);
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break;
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case ICE1712_SUBDEVICE_VX442:
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cs84xx_write_gpio(ice, reg_addr, data, VX442_SPDIF_CS);
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cs84xx_write_gpio(ice, reg_addr, data, VX442_SPDIF_CS, 0);
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break;
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}
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}
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@ -361,19 +367,20 @@ codec_read(ice1712 *ice, uint8 reg_addr)
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switch (ice->product) {
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case ICE1712_SUBDEVICE_DELTA66:
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case ICE1712_SUBDEVICE_DELTA44:
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val = ak45xx_read_gpio(ice, reg_addr, DELTA66_CODEC_CS_0);
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val = ak45xx_read_gpio(ice, reg_addr, DELTA66_CODEC_CS_0, 0);
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break;
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case ICE1712_SUBDEVICE_DELTA410:
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case ICE1712_SUBDEVICE_AUDIOPHILE_2496:
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case ICE1712_SUBDEVICE_DELTADIO2496:
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val = ak45xx_read_gpio(ice, reg_addr, AP2496_CODEC_CS);
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val = ak45xx_read_gpio(ice, reg_addr, AP2496_CODEC_CS, 0);
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break;
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case ICE1712_SUBDEVICE_DELTA1010:
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case ICE1712_SUBDEVICE_DELTA1010LT:
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val = ak45xx_read_gpio(ice, reg_addr, DELTA1010LT_CODEC_CS_0);
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val = ak45xx_read_gpio(ice, reg_addr, DELTA1010LT_CODEC_CS_0,
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DELTA1010LT_CS_NONE);
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break;
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case ICE1712_SUBDEVICE_VX442:
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val = ak45xx_read_gpio(ice, reg_addr, VX442_CODEC_CS_0);
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val = ak45xx_read_gpio(ice, reg_addr, VX442_CODEC_CS_0, 0);
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break;
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}
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@ -395,15 +402,16 @@ spdif_read(ice1712 *ice, uint8 reg_addr)
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case ICE1712_SUBDEVICE_DELTA44:
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break;
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case ICE1712_SUBDEVICE_AUDIOPHILE_2496:
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val = cs84xx_read_gpio(ice, reg_addr, AP2496_SPDIF_CS);
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val = cs84xx_read_gpio(ice, reg_addr, AP2496_SPDIF_CS, 0);
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break;
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case ICE1712_SUBDEVICE_DELTA410:
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break;
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case ICE1712_SUBDEVICE_DELTA1010LT:
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val = cs84xx_read_gpio(ice, reg_addr, DELTA1010LT_SPDIF_CS);
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val = cs84xx_read_gpio(ice, reg_addr, DELTA1010LT_SPDIF_CS,
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DELTA1010LT_CS_NONE);
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break;
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case ICE1712_SUBDEVICE_VX442:
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val = cs84xx_read_gpio(ice, reg_addr, VX442_SPDIF_CS);
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val = cs84xx_read_gpio(ice, reg_addr, VX442_SPDIF_CS, 0);
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break;
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}
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@ -458,13 +466,20 @@ read_gpio_byte(ice1712 *ice, uint8 gpio_data)
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}
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void
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ak45xx_write_gpio(ice1712 *ice, uint8 reg_addr, uint8 data, uint8 chip_select)
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ak45xx_write_gpio(ice1712 *ice, uint8 reg_addr, uint8 data,
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uint8 chip_select, uint8 invert_cs)
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{
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uint8 tmp;
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tmp = read_gpio(ice);
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tmp |= ice->CommLines.cs_mask;
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tmp &= ~(chip_select);
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if (invert_cs != 0) {
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tmp &= ~invert_cs;
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tmp |= chip_select;
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} else {
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tmp &= ~chip_select;
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}
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write_gpio(ice, tmp);
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snooze(GPIO_I2C_DELAY);
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@ -473,19 +488,30 @@ ak45xx_write_gpio(ice1712 *ice, uint8 reg_addr, uint8 data, uint8 chip_select)
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| (reg_addr & 0x1F), tmp);
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write_gpio_byte(ice, data, tmp);
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tmp |= chip_select;
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if (invert_cs != 0) {
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tmp |= invert_cs;
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} else {
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tmp |= chip_select;
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}
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write_gpio(ice, tmp);
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snooze(GPIO_I2C_DELAY);
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}
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void
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cs84xx_write_gpio(ice1712 *ice, uint8 reg_addr, uint8 data, uint8 chip_select)
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cs84xx_write_gpio(ice1712 *ice, uint8 reg_addr, uint8 data,
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uint8 chip_select, uint8 invert_cs)
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{
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uint8 tmp;
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tmp = read_gpio(ice);
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tmp |= ice->CommLines.cs_mask;
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tmp &= ~(chip_select);
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if (invert_cs != 0) {
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tmp &= ~invert_cs;
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tmp |= chip_select;
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} else {
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tmp &= ~chip_select;
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}
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write_gpio(ice, tmp);
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snooze(GPIO_I2C_DELAY);
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@ -494,19 +520,30 @@ cs84xx_write_gpio(ice1712 *ice, uint8 reg_addr, uint8 data, uint8 chip_select)
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write_gpio_byte(ice, reg_addr & 0x7F, tmp); //Do not Increment
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write_gpio_byte(ice, data, tmp);
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tmp |= chip_select;
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if (invert_cs != 0) {
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tmp |= invert_cs;
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} else {
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tmp |= chip_select;
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}
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write_gpio(ice, tmp);
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snooze(GPIO_I2C_DELAY);
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}
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uint8
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cs84xx_read_gpio(ice1712 *ice, uint8 reg_addr, uint8 chip_select)
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cs84xx_read_gpio(ice1712 *ice, uint8 reg_addr, uint8 chip_select,
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uint8 invert_cs)
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{
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uint8 tmp, data;
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tmp = read_gpio(ice);
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tmp |= ice->CommLines.cs_mask;
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tmp &= ~(chip_select);
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if (invert_cs != 0) {
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tmp &= ~invert_cs;
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tmp |= chip_select;
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} else {
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tmp &= ~chip_select;
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}
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write_gpio(ice, tmp);
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snooze(GPIO_I2C_DELAY);
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@ -515,11 +552,21 @@ cs84xx_read_gpio(ice1712 *ice, uint8 reg_addr, uint8 chip_select)
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tmp); //For writing the MAP
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write_gpio_byte(ice, reg_addr & 0x7F, tmp); //Do not Increment
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tmp |= chip_select; //Deselect the chip
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//Deselect the chip
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if (invert_cs != 0) {
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tmp |= invert_cs;
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} else {
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tmp |= chip_select;
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}
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write_gpio(ice, tmp);
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snooze(GPIO_I2C_DELAY);
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tmp &= ~(chip_select); //Reselect the chip
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if (invert_cs != 0) {
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tmp &= ~invert_cs;
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tmp |= chip_select;
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} else {
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tmp &= ~chip_select;
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}
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write_gpio(ice, tmp);
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snooze(GPIO_I2C_DELAY);
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@ -527,7 +574,12 @@ cs84xx_read_gpio(ice1712 *ice, uint8 reg_addr, uint8 chip_select)
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tmp); //For writing the MAP
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data = read_gpio_byte(ice, tmp); //For reading
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tmp |= chip_select; //Deselect the chip
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//Deselect the chip
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if (invert_cs != 0) {
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tmp |= invert_cs;
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} else {
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tmp |= chip_select;
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}
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write_gpio(ice, tmp);
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return data;
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