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XHCI: Fix a race condition in request submission.

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See inline comments. At least in brief testing I couldn't cause the
USB-HID stalls anymore, but they were very intermittent for me anyway.
But it was doubtless the case that the logic as it was before was
very much incorrect.
This commit is contained in:
Augustin Cavalier 2019-03-05 13:08:03 -05:00
parent 2df3446676
commit 57608a81c5
1 changed files with 14 additions and 3 deletions
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17
src/add-ons/kernel/busses/usb/xhci.cpp
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@ -828,11 +828,22 @@ XHCI::SubmitNormalRequest(Transfer *transfer)
remainingPackets -= packetsPerTrb; remainingPackets -= packetsPerTrb;
} }
// Set the IOC (Interrupt On Completion) bit and unset the CHAIN bit on // Set the IOC (Interrupt On Completion) bit so that we will get an event
// the final TRB in the transfer. (XHCI 1.1 § 6.4.1.1 Table 6-22 p443.) // and interrupt for this TRB as the transfer will be finished.
td->trbs[td->trb_used - 1].dwtrb3 &= ~TRB_3_CHAIN_BIT; // (XHCI 1.1 § 6.4.1.1 Table 6-22 p443.)
td->trbs[td->trb_used - 1].dwtrb3 |= TRB_3_IOC_BIT; td->trbs[td->trb_used - 1].dwtrb3 |= TRB_3_IOC_BIT;
// Set the ENT (Evaluate Next TRB) bit, so that the HC will not switch
// contexts before evaluating the Link TRB that _LinkDescriptorForPipe
// will insert, as otherwise there would be a race between us freeing
// and unlinking the descriptor, and the HC evaluating the Link TRB
// and thus getting back onto the main ring.
//
// Note that we *do not* unset the CHAIN bit in this TRB, thus including
// the Link TRB in this TD formally, which is required when using the
// ENT bit. (XHCI 1.1 § 4.12.3 p241.)
td->trbs[td->trb_used - 1].dwtrb3 |= TRB_3_ENT_BIT;
if (!directionIn) { if (!directionIn) {
TRACE("copying out iov count %ld\n", transfer->VectorCount()); TRACE("copying out iov count %ld\n", transfer->VectorCount());
transfer->PrepareKernelAccess(); transfer->PrepareKernelAccess();