x86[_64]: Separate bootloader and kernel GDT and IDT logic
From now on bootloader sets up its own minimal valid GDT and IDT. Then the kernel replaces them with its own tables.
This commit is contained in:
Pawel Dziepak
parent
e646703a6e
commit
527da4ca8a
@ -78,11 +78,6 @@ struct interrupt_descriptor {
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uint32 reserved : 32;
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} _PACKED;
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struct gdt_idt_descr {
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uint16 limit;
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addr_t base;
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} _PACKED;
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struct tss {
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uint32 _reserved1;
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uint64 sp0;
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@ -17,9 +17,6 @@
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#define _PACKED __attribute__((packed))
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#define IDT_LIMIT 0x800
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#define GDT_LIMIT 0x800
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// kernel args
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typedef struct {
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// architecture specific
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@ -30,10 +27,6 @@ typedef struct {
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uint32 num_pgtables;
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uint32 pgtables[MAX_BOOT_PTABLES];
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uint64 virtual_end;
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uint32 phys_idt;
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uint64 vir_idt;
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uint32 phys_gdt;
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uint64 vir_gdt;
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uint64 page_hole;
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// smp stuff
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uint32 apic_time_cv_factor; // apic ticks per second
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@ -49,8 +49,6 @@ enum gate_types {
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void x86_descriptors_preboot_init_percpu(kernel_args* args, int cpu);
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void x86_descriptors_init(kernel_args* args);
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void x86_descriptors_init_percpu(kernel_args* args, int cpu);
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status_t x86_descriptors_init_post_vm(kernel_args* args);
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#endif // !_ASSEMBLER
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@ -229,17 +229,3 @@ set_debug_idt()
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set_idt(sDebugIDTDescriptor);
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}
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void
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interrupts_init_kernel_idt(void* idt, size_t idtSize)
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{
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// clear it but copy the descriptors we've set up for the exceptions
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memset(idt, 0, idtSize);
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memcpy(idt, sDebugIDT, sizeof(sDebugIDT));
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// load the idt
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gdt_idt_descr idtDescriptor;
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idtDescriptor.limit = idtSize - 1;
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idtDescriptor.base = idt;
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set_idt(idtDescriptor);
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}
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@ -26,7 +26,6 @@ __BEGIN_DECLS
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void interrupts_init();
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void set_debug_idt();
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void restore_bios_idt();
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void interrupts_init_kernel_idt(void* idt, size_t idtSize);
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__END_DECLS
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@ -23,8 +23,8 @@
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#include <kernel.h>
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#include "debug.h"
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#include "smp.h"
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#include "mmu.h"
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#include "smp.h"
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static const uint64 kTableMappingFlags = 0x7;
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@ -34,8 +34,7 @@ static const uint64 kPageMappingFlags = 0x103;
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extern "C" void long_enter_kernel(int currentCPU, uint64 stackTop);
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extern uint32 gLongPhysicalGDT;
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extern uint64 gLongVirtualGDT;
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extern uint64 gLongGDT;
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extern uint32 gLongPhysicalPML4;
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extern uint64 gLongKernelEntry;
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@ -63,47 +62,21 @@ fix_address(FixedWidthPointer<Type>& p)
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static void
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long_gdt_init()
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{
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// Allocate memory for the GDT.
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segment_descriptor* gdt = (segment_descriptor*)
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mmu_allocate_page(&gKernelArgs.arch_args.phys_gdt);
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gKernelArgs.arch_args.vir_gdt = fix_address((addr_t)gdt);
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dprintf("GDT at phys 0x%lx, virt 0x%llx\n", gKernelArgs.arch_args.phys_gdt,
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gKernelArgs.arch_args.vir_gdt);
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clear_segment_descriptor(&gdt[0]);
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clear_segment_descriptor(&gBootGDT[0]);
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// Set up code/data segments (TSS segments set up later in the kernel).
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set_segment_descriptor(&gdt[KERNEL_CODE_SEGMENT], DT_CODE_EXECUTE_ONLY,
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set_segment_descriptor(&gBootGDT[KERNEL_CODE_SEGMENT], DT_CODE_EXECUTE_ONLY,
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DPL_KERNEL);
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set_segment_descriptor(&gdt[KERNEL_DATA_SEGMENT], DT_DATA_WRITEABLE,
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set_segment_descriptor(&gBootGDT[KERNEL_DATA_SEGMENT], DT_DATA_WRITEABLE,
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DPL_KERNEL);
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set_segment_descriptor(&gdt[USER_CODE_SEGMENT], DT_CODE_EXECUTE_ONLY,
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set_segment_descriptor(&gBootGDT[USER_CODE_SEGMENT], DT_CODE_EXECUTE_ONLY,
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DPL_USER);
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set_segment_descriptor(&gdt[USER_DATA_SEGMENT], DT_DATA_WRITEABLE,
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set_segment_descriptor(&gBootGDT[USER_DATA_SEGMENT], DT_DATA_WRITEABLE,
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DPL_USER);
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// Used by long_enter_kernel().
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gLongPhysicalGDT = gKernelArgs.arch_args.phys_gdt;
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gLongVirtualGDT = gKernelArgs.arch_args.vir_gdt;
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}
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static void
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long_idt_init()
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{
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interrupt_descriptor* idt = (interrupt_descriptor*)
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mmu_allocate_page(&gKernelArgs.arch_args.phys_idt);
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gKernelArgs.arch_args.vir_idt = fix_address((addr_t)idt);
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dprintf("IDT at phys %#lx, virt %#llx\n", gKernelArgs.arch_args.phys_idt,
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gKernelArgs.arch_args.vir_idt);
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// The 32-bit kernel gets an IDT with the loader's exception handlers until
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// it can set up its own. Can't do that here because they won't work after
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// switching to long mode. Therefore, just clear the IDT and leave the
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// kernel to set it up.
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memset(idt, 0, B_PAGE_SIZE);
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gLongGDT = fix_address((addr_t)gBootGDT);
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dprintf("GDT at 0x%llx\n", gLongGDT);
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}
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@ -340,7 +313,6 @@ long_start_kernel()
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smp_init_other_cpus();
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long_gdt_init();
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long_idt_init();
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long_mmu_init();
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debug_cleanup();
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convert_kernel_args();
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@ -8,6 +8,8 @@
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#define __x86_64__
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#include <arch/x86/descriptors.h>
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#include "mmu.h"
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#undef __x86_64__
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@ -25,10 +27,6 @@ FUNCTION(long_enter_kernel):
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movl 8(%esp), %edi
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movl 12(%esp), %esi
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// We're about to disable paging, so we need to load the the physical
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// address of our GDT.
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lgdtl long_phys_gdtr
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// Currently running with 32-bit paging tables at an identity mapped
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// address. To switch to 64-bit paging we must first disable 32-bit paging,
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// otherwise loading the new CR3 will fault.
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@ -57,6 +55,9 @@ FUNCTION(long_enter_kernel):
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orl $(1 << 31), %ecx
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movl %ecx, %cr0
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// Load 64-bit enabled GDT
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lgdtl long_gdtr
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// Jump into the 64-bit code segment.
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ljmp $KERNEL_CODE_SELECTOR, $.Llmode
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.align 8
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@ -71,9 +72,6 @@ FUNCTION(long_enter_kernel):
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mov %ax, %fs
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mov %ax, %gs
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// Load the virtual address of the GDT.
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lgdtq long_virt_gdtr(%rip)
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// Set the stack pointer.
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movl %edi, %esp
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shl $32, %rsi
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@ -94,16 +92,11 @@ FUNCTION(long_enter_kernel):
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.data
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long_phys_gdtr:
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.word GDT_LIMIT - 1
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SYMBOL(gLongPhysicalGDT):
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long_gdtr:
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.word BOOT_GDT_SEGMENT_COUNT * 8 - 1
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SYMBOL(gLongGDT):
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.long 0
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long_virt_gdtr:
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.word GDT_LIMIT - 1
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SYMBOL(gLongVirtualGDT):
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.quad 0
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SYMBOL(gLongPhysicalPML4):
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.long 0
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@ -69,6 +69,8 @@ struct extended_memory {
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};
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segment_descriptor gBootGDT[BOOT_GDT_SEGMENT_COUNT];
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static const uint32 kDefaultPageTableFlags = 0x07; // present, user, R/W
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static const size_t kMaxKernelSize = 0x1000000; // 16 MB for the kernel
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@ -535,76 +537,36 @@ extern "C" void
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mmu_init_for_kernel(void)
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{
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TRACE("mmu_init_for_kernel\n");
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// set up a new idt
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{
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uint32 *idt;
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// find a new idt
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idt = (uint32 *)get_next_physical_page();
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gKernelArgs.arch_args.phys_idt = (uint32)idt;
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TRACE("idt at %p\n", idt);
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// map the idt into virtual space
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gKernelArgs.arch_args.vir_idt = (uint32)get_next_virtual_page();
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map_page(gKernelArgs.arch_args.vir_idt, (uint32)idt, kDefaultPageFlags);
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// initialize it
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interrupts_init_kernel_idt((void*)(addr_t)gKernelArgs.arch_args.vir_idt,
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IDT_LIMIT);
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TRACE("idt at virtual address 0x%llx\n", gKernelArgs.arch_args.vir_idt);
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}
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// set up a new gdt
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{
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struct gdt_idt_descr gdtDescriptor;
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segment_descriptor *gdt;
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// find a new gdt
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gdt = (segment_descriptor *)get_next_physical_page();
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gKernelArgs.arch_args.phys_gdt = (uint32)gdt;
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// put standard segment descriptors in GDT
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clear_segment_descriptor(&gBootGDT[0]);
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TRACE("gdt at %p\n", gdt);
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// seg 0x08 - kernel 4GB code
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set_segment_descriptor(&gBootGDT[KERNEL_CODE_SEGMENT], 0, 0xffffffff,
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DT_CODE_READABLE, DPL_KERNEL);
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// map the gdt into virtual space
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gKernelArgs.arch_args.vir_gdt = (uint32)get_next_virtual_page();
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map_page(gKernelArgs.arch_args.vir_gdt, (uint32)gdt, kDefaultPageFlags);
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// seg 0x10 - kernel 4GB data
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set_segment_descriptor(&gBootGDT[KERNEL_DATA_SEGMENT], 0, 0xffffffff,
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DT_DATA_WRITEABLE, DPL_KERNEL);
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// put standard segment descriptors in it
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segment_descriptor* virtualGDT
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= (segment_descriptor*)(addr_t)gKernelArgs.arch_args.vir_gdt;
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clear_segment_descriptor(&virtualGDT[0]);
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// seg 0x1b - ring 3 user 4GB code
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set_segment_descriptor(&gBootGDT[USER_CODE_SEGMENT], 0, 0xffffffff,
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DT_CODE_READABLE, DPL_USER);
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// seg 0x08 - kernel 4GB code
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set_segment_descriptor(&virtualGDT[KERNEL_CODE_SEGMENT], 0, 0xffffffff,
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DT_CODE_READABLE, DPL_KERNEL);
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// seg 0x23 - ring 3 user 4GB data
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set_segment_descriptor(&gBootGDT[USER_DATA_SEGMENT], 0, 0xffffffff,
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DT_DATA_WRITEABLE, DPL_USER);
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// seg 0x10 - kernel 4GB data
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set_segment_descriptor(&virtualGDT[KERNEL_DATA_SEGMENT], 0, 0xffffffff,
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DT_DATA_WRITEABLE, DPL_KERNEL);
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// load the GDT
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struct gdt_idt_descr gdtDescriptor;
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gdtDescriptor.limit = sizeof(gBootGDT);
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gdtDescriptor.base = gBootGDT;
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// seg 0x1b - ring 3 user 4GB code
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set_segment_descriptor(&virtualGDT[USER_CODE_SEGMENT], 0, 0xffffffff,
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DT_CODE_READABLE, DPL_USER);
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asm("lgdt %0" : : "m" (gdtDescriptor));
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// seg 0x23 - ring 3 user 4GB data
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set_segment_descriptor(&virtualGDT[USER_DATA_SEGMENT], 0, 0xffffffff,
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DT_DATA_WRITEABLE, DPL_USER);
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// virtualGDT[5] and above will be filled later by the kernel
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// to contain the TSS descriptors, and for TLS (one for every CPU)
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// load the GDT
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gdtDescriptor.limit = GDT_LIMIT - 1;
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gdtDescriptor.base = (void*)(addr_t)gKernelArgs.arch_args.vir_gdt;
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asm("lgdt %0;"
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: : "m" (gdtDescriptor));
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TRACE("gdt at virtual address %p\n",
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(void*)gKernelArgs.arch_args.vir_gdt);
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}
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TRACE("gdt at virtual address %p\n", gBootGDT);
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// Save the memory we've virtually allocated (for the kernel and other
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// stuff)
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@ -6,9 +6,21 @@
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#define MMU_H
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#include <arch/x86/descriptors.h>
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#define BOOT_GDT_SEGMENT_COUNT (USER_DATA_SEGMENT + 1)
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#ifndef _ASSEMBLER
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#include <SupportDefs.h>
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extern segment_descriptor gBootGDT[BOOT_GDT_SEGMENT_COUNT];
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// For use with mmu_map_physical_memory()
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static const uint32 kDefaultPageFlags = 0x3; // present, R/W
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@ -33,4 +45,6 @@ extern bool mmu_get_virtual_mapping(addr_t virtualAddress,
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}
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#endif
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#endif // !_ASSEMBLER
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#endif /* MMU_H */
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@ -97,16 +97,12 @@ smp_start_kernel(void)
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asm("cld");
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asm("fninit");
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// Set up the final idt
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idt_descr.limit = IDT_LIMIT - 1;
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idt_descr.base = (uint32 *)(addr_t)gKernelArgs.arch_args.vir_idt;
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asm("lidt %0;"
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: : "m" (idt_descr));
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// Set up idt
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set_debug_idt();
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// Set up the final gdt
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gdt_descr.limit = GDT_LIMIT - 1;
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gdt_descr.base = (uint32 *)gKernelArgs.arch_args.vir_gdt;
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gdt_descr.limit = sizeof(gBootGDT) - 1;
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gdt_descr.base = gBootGDT;
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asm("lgdt %0;"
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: : "m" (gdt_descr));
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@ -99,11 +99,41 @@ set_task_gate(int32 cpu, int32 n, int32 segment)
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}
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static void
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static inline void
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load_tss()
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{
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short seg = (TSS_SEGMENT << 3) | DPL_KERNEL;
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asm("ltr %%ax" : : "a" (seg));
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uint16 segment = (TSS_SEGMENT << 3) | DPL_KERNEL;
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asm("ltr %w0" : : "r" (segment));
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}
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static inline void
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load_gdt(int cpu)
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{
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struct {
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uint16 limit;
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void* address;
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} _PACKED gdtDescriptor = {
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GDT_SEGMENT_COUNT * sizeof(segment_descriptor) - 1,
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gGDTs[cpu]
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};
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asm volatile("lgdt %0" : : "m" (gdtDescriptor));
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}
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static inline void
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load_idt(int cpu)
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{
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struct {
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uint16 limit;
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void* address;
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} _PACKED idtDescriptor = {
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IDT_GATES_COUNT * sizeof(interrupt_descriptor) - 1,
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&sIDTs[cpu]
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};
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asm volatile("lidt %0" : : "m" (idtDescriptor));
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}
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@ -181,8 +211,8 @@ init_double_fault(int cpuNum)
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struct tss* tss = &gCPU[cpuNum].arch.double_fault_tss;
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memset(tss, 0, sizeof(struct tss));
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size_t stackSize;
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tss->sp0 = (addr_t)x86_get_double_fault_stack(cpuNum, &stackSize);
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size_t stackSize = 0;
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//tss->sp0 = (addr_t)x86_get_double_fault_stack(cpuNum, &stackSize);
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tss->sp0 += stackSize;
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tss->ss0 = KERNEL_DATA_SELECTOR;
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tss->cr3 = x86_read_cr3();
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@ -206,21 +236,6 @@ init_double_fault(int cpuNum)
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}
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static void
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load_gdt(int cpu)
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{
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struct {
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uint16 limit;
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void* address;
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} _PACKED gdt_descriptor = {
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GDT_SEGMENT_COUNT * sizeof(segment_descriptor) - 1,
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gGDTs[cpu]
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};
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asm volatile("lgdt %0" : : "m" (gdt_descriptor));
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}
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static void
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init_gdt_percpu(kernel_args* args, int cpu)
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{
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@ -264,22 +279,7 @@ init_gdt_percpu(kernel_args* args, int cpu)
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load_tss();
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// set kernel TLS segment
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asm volatile("movw %0, %%gs" : : "r" (KERNEL_TLS_SEGMENT << 3));
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}
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static void
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load_idt(int cpu)
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{
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struct {
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uint16 limit;
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void* address;
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} _PACKED idt_descriptor = {
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IDT_GATES_COUNT * sizeof(interrupt_descriptor) - 1,
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&sIDTs[cpu]
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};
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asm volatile("lidt %0" : : "m" (idt_descriptor));
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asm volatile("movw %w0, %%gs" : : "r" (KERNEL_TLS_SEGMENT << 3));
|
||||
}
|
||||
|
||||
|
||||
@ -593,16 +593,3 @@ x86_descriptors_init(kernel_args* args)
|
||||
table[19] = x86_unexpected_exception; // SIMD Floating-Point Exception (#XF)
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
x86_descriptors_init_percpu(kernel_args* /* args */, int /* cpu */)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
status_t
|
||||
x86_descriptors_init_post_vm(kernel_args* /* args */)
|
||||
{
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
|
||||
@ -15,23 +15,56 @@
|
||||
#include <arch/user_debugger.h>
|
||||
|
||||
|
||||
#define IDT_GATES_COUNT 256
|
||||
|
||||
|
||||
typedef void interrupt_handler_function(iframe* frame);
|
||||
|
||||
|
||||
static segment_descriptor* sGDT;
|
||||
static interrupt_descriptor* sIDT;
|
||||
static segment_descriptor sGDT[GDT_SEGMENT_COUNT];
|
||||
static interrupt_descriptor sIDT[IDT_GATES_COUNT];
|
||||
|
||||
static const uint32 kInterruptHandlerTableSize = 256;
|
||||
static const uint32 kInterruptHandlerTableSize = IDT_GATES_COUNT;
|
||||
interrupt_handler_function* gInterruptHandlerTable[kInterruptHandlerTableSize];
|
||||
|
||||
extern uint8 isr_array[kInterruptHandlerTableSize][16];
|
||||
|
||||
|
||||
static void
|
||||
static inline void
|
||||
load_tss(int cpu)
|
||||
{
|
||||
uint16 seg = (TSS_SEGMENT(cpu) << 3) | DPL_KERNEL;
|
||||
asm volatile("ltr %%ax" :: "a" (seg));
|
||||
uint16 segment = (TSS_SEGMENT(cpu) << 3) | DPL_KERNEL;
|
||||
asm volatile("ltr %w0" : : "a" (segment));
|
||||
}
|
||||
|
||||
|
||||
static inline void
|
||||
load_gdt()
|
||||
{
|
||||
struct {
|
||||
uint16 limit;
|
||||
void* address;
|
||||
} _PACKED gdtDescriptor = {
|
||||
GDT_SEGMENT_COUNT * sizeof(segment_descriptor) - 1,
|
||||
sGDT
|
||||
};
|
||||
|
||||
asm volatile("lgdt %0" : : "m" (gdtDescriptor));
|
||||
}
|
||||
|
||||
|
||||
static inline void
|
||||
load_idt()
|
||||
{
|
||||
struct {
|
||||
uint16 limit;
|
||||
void* address;
|
||||
} _PACKED idtDescriptor = {
|
||||
IDT_GATES_COUNT * sizeof(interrupt_descriptor) - 1,
|
||||
sIDT
|
||||
};
|
||||
|
||||
asm volatile("lidt %0" : : "m" (idtDescriptor));
|
||||
}
|
||||
|
||||
|
||||
@ -61,18 +94,43 @@ x86_64_general_protection_fault(iframe* frame)
|
||||
|
||||
|
||||
void
|
||||
x86_descriptors_preboot_init_percpu(kernel_args* /* args */, int /* cpu */)
|
||||
x86_descriptors_preboot_init_percpu(kernel_args* args, int cpu)
|
||||
{
|
||||
if (cpu == 0) {
|
||||
STATIC_ASSERT(GDT_SEGMENT_COUNT <= 8192);
|
||||
|
||||
set_segment_descriptor(&sGDT[KERNEL_CODE_SEGMENT], DT_CODE_EXECUTE_ONLY,
|
||||
DPL_KERNEL);
|
||||
set_segment_descriptor(&sGDT[KERNEL_DATA_SEGMENT], DT_DATA_WRITEABLE,
|
||||
DPL_KERNEL);
|
||||
set_segment_descriptor(&sGDT[USER_CODE_SEGMENT], DT_CODE_EXECUTE_ONLY,
|
||||
DPL_USER);
|
||||
set_segment_descriptor(&sGDT[USER_DATA_SEGMENT], DT_DATA_WRITEABLE,
|
||||
DPL_USER);
|
||||
}
|
||||
|
||||
memset(&gCPU[cpu].arch.tss, 0, sizeof(struct tss));
|
||||
gCPU[cpu].arch.tss.io_map_base = sizeof(struct tss);
|
||||
|
||||
// Set up the descriptor for this TSS.
|
||||
set_tss_descriptor(&sGDT[TSS_SEGMENT(cpu)], (addr_t)&gCPU[cpu].arch.tss,
|
||||
sizeof(struct tss));
|
||||
|
||||
// Set up the double fault IST entry (see x86_descriptors_init()).
|
||||
struct tss* tss = &gCPU[cpu].arch.tss;
|
||||
size_t stackSize;
|
||||
tss->ist1 = (addr_t)x86_get_double_fault_stack(cpu, &stackSize);
|
||||
tss->ist1 += stackSize;
|
||||
|
||||
load_idt();
|
||||
load_gdt();
|
||||
load_tss(cpu);
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
x86_descriptors_init(kernel_args* args)
|
||||
{
|
||||
// The boot loader sets up a GDT and allocates an empty IDT for us.
|
||||
sGDT = (segment_descriptor*)args->arch_args.vir_gdt;
|
||||
sIDT = (interrupt_descriptor*)args->arch_args.vir_idt;
|
||||
|
||||
// Fill out the IDT, pointing each entry to the corresponding entry in the
|
||||
// ISR array created in arch_interrupts.S (see there to see how this works).
|
||||
for(uint32 i = 0; i < kInterruptHandlerTableSize; i++) {
|
||||
@ -120,59 +178,3 @@ x86_descriptors_init(kernel_args* args)
|
||||
table[19] = x86_unexpected_exception; // SIMD Floating-Point Exception (#XF)
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
x86_descriptors_init_percpu(kernel_args* args, int cpu)
|
||||
{
|
||||
// Load the IDT.
|
||||
gdt_idt_descr idtr = {
|
||||
256 * sizeof(interrupt_descriptor) - 1,
|
||||
(addr_t)sIDT
|
||||
};
|
||||
asm volatile("lidt %0" :: "m" (idtr));
|
||||
|
||||
// Load the TSS for non-boot CPUs (boot CPU gets done below).
|
||||
if (cpu != 0) {
|
||||
load_tss(cpu);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
status_t
|
||||
x86_descriptors_init_post_vm(kernel_args* args)
|
||||
{
|
||||
area_id area;
|
||||
|
||||
// Create an area for the GDT.
|
||||
area = create_area("gdt", (void**)&sGDT, B_EXACT_ADDRESS, B_PAGE_SIZE,
|
||||
B_ALREADY_WIRED, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA);
|
||||
if (area < B_OK)
|
||||
return area;
|
||||
|
||||
// Same for the IDT.
|
||||
area = create_area("idt", (void**)&sIDT, B_EXACT_ADDRESS, B_PAGE_SIZE,
|
||||
B_ALREADY_WIRED, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA);
|
||||
if (area < B_OK)
|
||||
return area;
|
||||
|
||||
for (uint32 i = 0; i < args->num_cpus; i++) {
|
||||
// Set up the task state segment.
|
||||
memset(&gCPU[i].arch.tss, 0, sizeof(struct tss));
|
||||
gCPU[i].arch.tss.io_map_base = sizeof(struct tss);
|
||||
|
||||
// Set up the descriptor for this TSS.
|
||||
set_tss_descriptor(&sGDT[TSS_SEGMENT(i)], (addr_t)&gCPU[i].arch.tss,
|
||||
sizeof(struct tss));
|
||||
|
||||
// Set up the double fault IST entry (see x86_descriptors_init()).
|
||||
struct tss* tss = &gCPU[i].arch.tss;
|
||||
size_t stackSize;
|
||||
tss->ist1 = (addr_t)x86_get_double_fault_stack(i, &stackSize);
|
||||
tss->ist1 += stackSize;
|
||||
}
|
||||
|
||||
// Load the TSS for the boot CPU.
|
||||
load_tss(0);
|
||||
|
||||
return B_OK;
|
||||
}
|
||||
|
||||
@ -1053,8 +1053,6 @@ detect_amdc1e_noarat()
|
||||
status_t
|
||||
arch_cpu_init_percpu(kernel_args* args, int cpu)
|
||||
{
|
||||
x86_descriptors_init_percpu(args, cpu);
|
||||
|
||||
detect_cpu(cpu);
|
||||
|
||||
if (!gCpuIdleFunc) {
|
||||
@ -1115,9 +1113,6 @@ arch_cpu_init_post_vm(kernel_args* args)
|
||||
&virtualRestrictions, &physicalRestrictions,
|
||||
(void**)&sDoubleFaultStacks);
|
||||
|
||||
// More descriptor table setup.
|
||||
x86_descriptors_init_post_vm(args);
|
||||
|
||||
X86PagingStructures* kernelPagingStructures
|
||||
= static_cast<X86VMTranslationMap*>(
|
||||
VMAddressSpace::Kernel()->TranslationMap())->PagingStructures();
|
||||
|
||||
Loading…
Reference in New Issue
Block a user