[ARM]

Start of framebuffer initialization for the Verdex board.
For now it points to the data section as framebuffer for testing and shows an RGB pattern.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32352 a95241bf-73f2-0310-859d-f6bbb57e9c96

headers/private/kernel/arch/arm/pxa270.h

@@ -20,8 +20,8 @@
  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-#ifndef __PLATFORM_OMAP3_H
-#define __PLATFORM_OMAP3_H
+#ifndef __PLATFORM_PXA270_H
+#define __PLATFORM_PXA270_H
 
 #define SDRAM_BASE 0xa2000000
 
@@ -64,5 +64,47 @@
 #define UART_MVR    19
 #define UART_SYSC   20
 
-#endif
+/* DMA controller */
 
+typedef struct pxa27x_dma_descriptor {
+	uint32 ddadr;
+	uint32 dsadr;
+	uint32 dtadr;
+	uint32 dcmd;
+} pxa27x_dma_descriptor __attribute__ ((aligned(16)));
+
+/* LCD controller */
+
+#define LCC_BASE	0x44000000
+
+#define LCCR0		(LCC_BASE+0x00)
+#define LCCR1		(LCC_BASE+0x04)
+#define LCCR2		(LCC_BASE+0x08)
+#define LCCR3		(LCC_BASE+0x0C)
+#define LCCR4		(LCC_BASE+0x10)
+#define LCCR5		(LCC_BASE+0x14)
+
+#define LCSR1		(LCC_BASE+0x34)
+#define LCSR0		(LCC_BASE+0x38)
+#define LIIDR		(LCC_BASE+0x3C)
+
+#define OVL1C1		(LCC_BASE+0x50)
+#define OVL1C2		(LCC_BASE+0x60)
+#define OVL2C1		(LCC_BASE+0x70)
+#define OVL2C2		(LCC_BASE+0x80)
+
+#define LCC_CCR		(LCC_BASE+0x90)
+#define LCC_CMDCR	(LCC_BASE+0x100)
+
+#define FDADR0		(LCC_BASE+0x200)
+#define FBR0		(LCC_BASE+0x020)
+#define FSADR0		(LCC_BASE+0x204)
+
+typedef struct pxa27x_lcd_dma_descriptor {
+	uint32 fdadr;
+	uint32 fsadr;
+	uint32 fidr;
+	uint32 ldcmd;
+} pxa27x_lcd_dma_descriptor __attribute__ ((aligned(16)));
+
+#endif /* __PLATFORM_PXA270_H */

src/system/boot/arch/arm/Jamfile

@@ -18,6 +18,7 @@ local kernelLibArchObjects =
 KernelMergeObject boot_arch_$(TARGET_ARCH).o :
 	uart.c
 	arch_elf.cpp
+	arch_video.cpp
 	$(librootArchObjects)
 	: -fno-pic
 	:

src/system/boot/arch/arm/arch_video.cpp

@@ -0,0 +1,106 @@
+/*
+ * Copyright 2009, François Revol, revol@free.fr.
+ * Distributed under the terms of the MIT License.
+ */
+
+
+#include "arch_video.h"
+
+#include <arch/cpu.h>
+#include <boot/stage2.h>
+#include <boot/platform.h>
+#include <boot/menu.h>
+#include <boot/kernel_args.h>
+#include <boot/images.h>
+#include <board_config.h>
+#include <util/list.h>
+#include <drivers/driver_settings.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+struct fb_description gFrameBuffer;
+
+#define TRACE_VIDEO
+#ifdef TRACE_VIDEO
+#	define TRACE(x) dprintf x
+#else
+#	define TRACE(x) ;
+#endif
+
+#define write_io_32(a, v) ((*(vuint32 *)a) = v)
+#define read_io_32(a) (*(vuint32 *)a)
+
+#define dumpr(a) dprintf("LCC:%s:0x%lx\n", #a, read_io_32(a))
+
+//	#pragma mark -
+
+
+#if BOARD_CPU_PXA270
+static struct pxa27x_lcd_dma_descriptor sVideoDMADesc;
+static uint32 scratch[128] __attribute__((aligned(16)));
+status_t
+arch_init_video(void)
+{
+	void *fb;
+	//fb = malloc(800*600*4 + 16 - 1);
+	//fb = (void *)(((uint32)fb) & ~(0x0f));
+	//fb = (void *)0xa0000000;
+	fb = scratch - 800;
+
+	dprintf("fb @ %p\n", fb);
+
+	
+	sVideoDMADesc.fdadr = ((uint32)&sVideoDMADesc & ~0x0f) | 0x01;
+	sVideoDMADesc.fsadr = (uint32)(fb) & ~0x0f;
+	sVideoDMADesc.fidr = 0;
+	sVideoDMADesc.ldcmd = (800*600*4);
+
+	// if not already enabled, set a default mode
+	if (!(read_io_32(LCCR0) & 0x00000001)) {
+		dprintf("Setting default video mode 800x600\n");
+		int bpp = 0x09; // 24 bpp
+		int pdfor = 0x3; // Format 4: RGB888 (no alpha bit)
+		write_io_32(LCCR1, (0 << 0) | (800));
+		write_io_32(LCCR2, (0 << 0) | (600-1));
+		write_io_32(LCCR3, (pdfor << 30) | ((bpp >> 3) << 29) | ((bpp & 0x07) << 24));
+		write_io_32(FDADR0, sVideoDMADesc.fdadr);
+		write_io_32(LCCR0, read_io_32(LCCR0) | 0x01800001);     // no ints +ENB
+		write_io_32(FBR0, sVideoDMADesc.fdadr);
+	dumpr(LCCR0);
+	dumpr(LCCR1);
+	dumpr(LCCR2);
+	dumpr(LCCR3);
+	dumpr(LCCR4);
+	
+	for (int i = 0; i < 128; i++)
+		//((uint32 *)fb)[i+16] = 0x000000ff << ((i%4) * 8);
+		scratch[i] = 0x000000ff << ((i%4) * 8);
+	}
+	return B_OK;
+}
+
+#elif BOARD_CPU_OMAP3
+
+status_t
+arch_init_video(void)
+{
+	return B_OK;
+}
+
+#else
+
+
+status_t
+arch_init_video(void)
+{
+	return B_OK;
+}
+
+#endif
+
+
+//	#pragma mark -
+
+

src/system/boot/arch/arm/arch_video.h

@@ -0,0 +1,25 @@
+/*
+ * Copyright 2009, Haiku Inc.
+ * All rights reserved. Distributed under the terms of the MIT License.
+ */
+#ifndef _ARCH_VIDEO_H
+#define _ARCH_VIDEO_H
+
+#include <SupportDefs.h>
+
+struct fb_description {
+        uint8 *base;
+        uint32 size;
+        uint32 bytes_per_row;
+        uint16 width;
+        uint16 height;
+        uint8 depth;
+        bool enabled;
+};
+
+extern struct fb_description gFrameBuffer;
+
+extern status_t arch_init_video();
+
+
+#endif /* _ARCH_VIDEO_H */

src/system/boot/platform/u-boot/Jamfile

@@ -2,6 +2,8 @@ SubDir HAIKU_TOP src system boot platform u-boot ;
 
 SubDirHdrs $(HAIKU_TOP) headers private kernel boot platform $(TARGET_BOOT_PLATFORM) ;
 
+SubDirHdrs $(HAIKU_TOP) src system boot arch $(TARGET_ARCH) ;
+
 UsePrivateHeaders [ FDirName kernel disk_device_manager ] ;
 UsePrivateHeaders [ FDirName graphics common ] ;
 UsePrivateHeaders [ FDirName graphics vesa ] ;

src/system/boot/platform/u-boot/video.cpp

@@ -5,6 +5,7 @@
 
 
 #include "video.h"
+#include "arch_video.h"
 
 #include <arch/cpu.h>
 #include <boot/stage2.h>
@@ -85,6 +86,8 @@ extern "C" status_t
 platform_init_video(void)
 {
     	#warning ARM:TODO
-	return B_OK;
+dprintf("init_video\n");
+	return arch_init_video();
+	//return B_OK;
 }