sdhci: implement uninit_bus
Also avoid leaking resources in case initialization fails. Change-Id: Ia533182eeeb81b7d52b49510b1f375a4fc55258f Reviewed-on: https://review.haiku-os.org/c/1030 Reviewed-by: waddlesplash <waddlesplash@gmail.com>
This commit is contained in:
Adrien Destugues
waddlesplash
parent
cdc4a175ca
commit
3aef22f7c8
@ -1,5 +1,5 @@
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/*
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* Copyright 2018 Haiku, Inc. All rights reserved.
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* Copyright 2018-2019 Haiku, Inc. All rights reserved.
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* Distributed under the terms of the MIT License.
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*
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* Authors:
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@ -31,23 +31,13 @@
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#define SDHCI_PCI_DEVICE_MODULE_NAME "busses/mmc/sdhci_pci/driver_v1"
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#define SDHCI_PCI_MMC_BUS_MODULE_NAME "busses/mmc/sdhci_pci/device/v1"
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#define SDHCI_PCI_CONTROLLER_TYPE_NAME "sdhci pci controller"
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#define SLOTS_COUNT "device/slots_count"
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#define SLOT_NUMBER "device/slot"
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#define BAR_INDEX "device/bar"
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typedef struct {
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pci_device_module_info* pci;
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pci_device* device;
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addr_t base_addr;
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uint8 irq;
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sdhci_mmc_bus mmc_bus;
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area_id regs_area;
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device_node* node;
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pci_info info;
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struct registers* _regs;
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struct registers* fRegisters;
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uint8_t fIrq;
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} sdhci_pci_mmc_bus_info;
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@ -195,7 +185,6 @@ init_bus(device_node* node, void** bus_cookie)
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if (bus == NULL)
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return B_NO_MEMORY;
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pci_info* pciInfo = &bus->info;
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pci_device_module_info* pci;
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pci_device* device;
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@ -212,25 +201,17 @@ init_bus(device_node* node, void** bus_cookie)
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TRACE("PCIx86Module not loaded\n");
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}
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int msiCount = sPCIx86Module->get_msi_count(pciInfo->bus,
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pciInfo->device, pciInfo->function);
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TRACE("interrupts count: %d\n",msiCount);
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if (gDeviceManager->get_attr_uint8(node, SLOT_NUMBER, &slot, false) < B_OK
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|| gDeviceManager->get_attr_uint8(node, BAR_INDEX, &bar, false) < B_OK)
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return -1;
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TRACE("Controller has %d slots, first bar is %d\n", slot + 1, bar);
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TRACE("Register SD bus at slot %d, using bar %d\n", slot + 1, bar);
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bus->node = node;
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bus->pci = pci;
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bus->device = device;
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pci->get_pci_info(device, pciInfo);
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// legacy interrupt
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bus->base_addr = pciInfo->u.h0.base_registers[bar];
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pci_info pciInfo;
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pci->get_pci_info(device, &pciInfo);
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int msiCount = sPCIx86Module->get_msi_count(pciInfo.bus,
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pciInfo.device, pciInfo.function);
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TRACE("interrupts count: %d\n",msiCount);
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// enable bus master and io
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uint16 pcicmd = pci->read_pci_config(device, PCI_command, 2);
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@ -239,14 +220,14 @@ init_bus(device_node* node, void** bus_cookie)
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pci->write_pci_config(device, PCI_command, 2, pcicmd);
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TRACE("init_bus() %p node %p pci %p device %p\n", bus, node,
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bus->pci, bus->device);
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pci, device);
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// mapping the registers by MMUIO method
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int bar_size = pciInfo->u.h0.base_register_sizes[bar];
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regs_area = map_physical_memory("sdhc_regs_map",
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pciInfo->u.h0.base_registers[bar],
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pciInfo->u.h0.base_register_sizes[bar], B_ANY_KERNEL_BLOCK_ADDRESS,
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pciInfo.u.h0.base_registers[bar],
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pciInfo.u.h0.base_register_sizes[bar], B_ANY_KERNEL_BLOCK_ADDRESS,
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B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void**)®s);
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if (regs_area < B_OK) {
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@ -254,29 +235,40 @@ init_bus(device_node* node, void** bus_cookie)
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return B_BAD_VALUE;
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}
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bus->regs_area = regs_area;
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struct registers* _regs = (struct registers*)regs;
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bus->_regs = _regs;
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bus->fRegisters = _regs;
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sdhci_reset(_regs);
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bus->irq = pciInfo->u.h0.interrupt_line;
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TRACE("irq interrupt line: %d\n",bus->irq);
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// the interrupt is shared between all busses in an SDHC controller, but
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// they each register an handler. Not a problem, we will just test the
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// interrupt registers for all busses one after the other and find no
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// interrupts on the idle busses.
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bus->fIrq = pciInfo.u.h0.interrupt_line;
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if (bus->irq == 0 || bus->irq == 0xff) {
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TRACE("irq interrupt line: %d\n", bus->fIrq);
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if (bus->fIrq == 0 || bus->fIrq == 0xff) {
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TRACE("PCI IRQ not assigned\n");
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if (sPCIx86Module != NULL) {
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put_module(B_PCI_X86_MODULE_NAME);
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sPCIx86Module = NULL;
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}
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delete_area(regs_area);
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delete bus;
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return B_ERROR;
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}
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status = install_io_interrupt_handler(bus->irq,
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status = install_io_interrupt_handler(bus->fIrq,
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sdhci_generic_interrupt, bus, 0);
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if (status != B_OK) {
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TRACE("can't install interrupt handler\n");
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if (sPCIx86Module != NULL) {
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put_module(B_PCI_X86_MODULE_NAME);
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sPCIx86Module = NULL;
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}
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delete_area(regs_area);
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delete bus;
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return status;
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}
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TRACE("interrupt handler installed\n");
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@ -299,6 +291,25 @@ init_bus(device_node* node, void** bus_cookie)
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}
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static void
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uninit_bus(void* bus_cookie)
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{
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sdhci_pci_mmc_bus_info* bus = (sdhci_pci_mmc_bus_info*)bus_cookie;
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bus->fRegisters->interrupt_signal_enable = 0;
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bus->fRegisters->interrupt_status_enable = 0;
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remove_io_interrupt_handler(bus->fIrq, sdhci_generic_interrupt, bus);
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area_id regs_area = area_for(bus->fRegisters);
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delete_area(regs_area);
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// FIXME do we need to put() the PCI module here?
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delete bus;
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}
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void
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sdhci_error_interrupt_recovery(struct registers* _regs)
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{
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@ -321,7 +332,7 @@ sdhci_generic_interrupt(void* data)
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uint32_t intmask, card_present;
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intmask = bus->_regs->slot_interrupt_status;
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intmask = bus->fRegisters->slot_interrupt_status;
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if ((intmask == 0) || (intmask == 0xffffffff)) {
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TRACE("invalid command interrupt\n");
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@ -332,17 +343,17 @@ sdhci_generic_interrupt(void* data)
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// handling card presence interrupt
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if (intmask & (SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM)) {
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card_present = ((intmask & SDHCI_INT_CARD_INS) != 0);
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bus->_regs->interrupt_status_enable &= ~(SDHCI_INT_CARD_INS
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bus->fRegisters->interrupt_status_enable &= ~(SDHCI_INT_CARD_INS
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| SDHCI_INT_CARD_REM);
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bus->_regs->interrupt_signal_enable &= ~(SDHCI_INT_CARD_INS
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bus->fRegisters->interrupt_signal_enable &= ~(SDHCI_INT_CARD_INS
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| SDHCI_INT_CARD_REM);
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bus->_regs->interrupt_status_enable |= card_present
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bus->fRegisters->interrupt_status_enable |= card_present
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? SDHCI_INT_CARD_REM : SDHCI_INT_CARD_INS;
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bus->_regs->interrupt_signal_enable |= card_present
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bus->fRegisters->interrupt_signal_enable |= card_present
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? SDHCI_INT_CARD_REM : SDHCI_INT_CARD_INS;
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bus->_regs->interrupt_status |= (intmask &
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bus->fRegisters->interrupt_status |= (intmask &
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(SDHCI_INT_CARD_INS | SDHCI_INT_CARD_REM));
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TRACE("Card presence interrupt handled\n");
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@ -351,7 +362,7 @@ sdhci_generic_interrupt(void* data)
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// handling command interrupt
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if (intmask & SDHCI_INT_CMD_MASK) {
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bus->_regs->interrupt_status |= (intmask & SDHCI_INT_CMD_MASK);
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bus->fRegisters->interrupt_status |= (intmask & SDHCI_INT_CMD_MASK);
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// TODO do something with the interrupt
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TRACE("Command interrupt handled\n");
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@ -360,7 +371,7 @@ sdhci_generic_interrupt(void* data)
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// handling bus power interrupt
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if (intmask & SDHCI_INT_BUS_POWER) {
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bus->_regs->interrupt_status |= SDHCI_INT_BUS_POWER;
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bus->fRegisters->interrupt_status |= SDHCI_INT_BUS_POWER;
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TRACE("card is consuming too much power\n");
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return B_HANDLED_INTERRUPT;
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@ -373,14 +384,6 @@ sdhci_generic_interrupt(void* data)
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}
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static void
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uninit_bus(void* bus_cookie)
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{
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sdhci_pci_mmc_bus_info* bus = (sdhci_pci_mmc_bus_info*)bus_cookie;
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delete bus;
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}
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static void
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bus_removed(void* bus_cookie)
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{
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@ -453,7 +456,7 @@ static status_t
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register_device(device_node* parent)
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{
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device_attr attrs[] = {
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{B_DEVICE_PRETTY_NAME, B_STRING_TYPE, {string: "SDHC PCI controller"}},
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{B_DEVICE_PRETTY_NAME, B_STRING_TYPE, {string: "SD Host Controller"}},
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{}
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};
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@ -1,5 +1,5 @@
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/*
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* Copyright 2018 Haiku, Inc. All rights reserved.
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* Copyright 2018-2019 Haiku, Inc. All rights reserved.
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* Distributed under the terms of the MIT License.
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*
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* Authors:
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