diff --git a/src/add-ons/accelerants/s3/virge_edid.cpp b/src/add-ons/accelerants/s3/virge_edid.cpp
index c1e58de595..137ee8a6e0 100644
--- a/src/add-ons/accelerants/s3/virge_edid.cpp
+++ b/src/add-ons/accelerants/s3/virge_edid.cpp
@@ -92,7 +92,7 @@ Virge_GetEdidInfo(edid1_info& edidInfo)
 		uint32 DDCPort = 0xAA;
 
 		i2c_bus bus;
-		bus.cookie = (void*)DDCPort;
+		bus.cookie = (void*)(addr_t)DDCPort;
 		bus.set_signals = &SetI2CSignals_Alt;
 		bus.get_signals = &GetI2CSignals_Alt;
 		ddc2_init_timing(&bus);
diff --git a/src/add-ons/accelerants/s3/virge_init.cpp b/src/add-ons/accelerants/s3/virge_init.cpp
index b726cc49db..265e91f615 100644
--- a/src/add-ons/accelerants/s3/virge_init.cpp
+++ b/src/add-ons/accelerants/s3/virge_init.cpp
@@ -89,9 +89,9 @@ Virge_Init(void)
 	// some DX chipsets don't seem to do it automatically.
 
 	WritePIO_8(CRTC_INDEX, 0x59);
-	WritePIO_8(CRTC_DATA, (uint32)(si.videoMemPCI) >> 24);
+	WritePIO_8(CRTC_DATA, (uint8)((uint32)(si.videoMemPCI) >> 24));
 	WritePIO_8(CRTC_INDEX, 0x5A);
-	WritePIO_8(CRTC_DATA, (uint32)(si.videoMemPCI) >> 16);
+	WritePIO_8(CRTC_DATA, (uint8)((uint32)(si.videoMemPCI) >> 16));
 
 	// Enable MMIO.