small update to keep accelerant working with already modified kerneldriver and shared_info for mainmem DMA buffer.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12836 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
parent
b82b759368
commit
395332ac33
@ -864,10 +864,10 @@ status_t nv_acc_init_dma()
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}
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/*** init DMA command buffer info ***/
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si->engine.dma.cmdbuffer = (uint32 *)((char *)si->framebuffer +
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si->dma_buffer = (void *)((char *)si->framebuffer +
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((si->ps.memory_size - 1) & 0xffff8000));
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LOG(4,("ACC_DMA: command buffer is at adress $%08x\n",
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((uint32)(si->engine.dma.cmdbuffer))));
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((uint32)(si->dma_buffer))));
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/* we have issued no DMA cmd's to the engine yet */
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si->engine.dma.put = 0;
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/* the current first free adress in the DMA buffer is at offset 0 */
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@ -939,39 +939,39 @@ status_t nv_acc_init_dma()
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if (nv_acc_fifofree_dma(5) != B_OK) return B_ERROR;
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/* now setup 2D surface (writing 5 32bit words) */
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nv_acc_cmd_dma(NV4_SURFACE, NV4_SURFACE_FORMAT, 4);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = surf_depth; /* Format */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = surf_depth; /* Format */
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/* setup screen pitch */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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((si->fbc.bytes_per_row & 0x0000ffff) | (si->fbc.bytes_per_row << 16)); /* Pitch */
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/* setup screen location */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer); /* OffsetSource */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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((uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer); /* OffsetDest */
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/* wait for room in fifo for pattern colordepth setup cmd if needed */
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if (nv_acc_fifofree_dma(2) != B_OK) return B_ERROR;
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/* set pattern colordepth (writing 2 32bit words) */
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nv_acc_cmd_dma(NV_IMAGE_PATTERN, NV_IMAGE_PATTERN_SETCOLORFORMAT, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = cmd_depth; /* SetColorFormat */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = cmd_depth; /* SetColorFormat */
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/* wait for room in fifo for bitmap colordepth setup cmd if needed */
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if (nv_acc_fifofree_dma(2) != B_OK) return B_ERROR;
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/* set bitmap colordepth (writing 2 32bit words) */
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nv_acc_cmd_dma(NV4_GDI_RECTANGLE_TEXT, NV4_GDI_RECTANGLE_TEXT_SETCOLORFORMAT, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = cmd_depth; /* SetColorFormat */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = cmd_depth; /* SetColorFormat */
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/* Load our pattern into the engine: */
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/* wait for room in fifo for pattern cmd if needed. */
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if (nv_acc_fifofree_dma(7) != B_OK) return B_ERROR;
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/* now setup pattern (writing 7 32bit words) */
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nv_acc_cmd_dma(NV_IMAGE_PATTERN, NV_IMAGE_PATTERN_SETSHAPE, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0x00000000; /* SetShape: 0 = 8x8, 1 = 64x1, 2 = 1x64 */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0x00000000; /* SetShape: 0 = 8x8, 1 = 64x1, 2 = 1x64 */
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nv_acc_cmd_dma(NV_IMAGE_PATTERN, NV_IMAGE_PATTERN_SETCOLOR0, 4);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0xffffffff; /* SetColor0 */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0xffffffff; /* SetColor1 */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0xffffffff; /* SetPattern[0] */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0xffffffff; /* SetPattern[1] */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0xffffffff; /* SetColor0 */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0xffffffff; /* SetColor1 */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0xffffffff; /* SetPattern[0] */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0xffffffff; /* SetPattern[1] */
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/* tell the engine to fetch and execute all (new) commands in the DMA buffer */
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nv_start_dma();
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@ -1286,7 +1286,7 @@ static status_t nv_acc_fifofree_dma(uint16 cmd_size)
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{
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/* not enough room left, so instruct DMA engine to reset the buffer
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* when it's reaching the end of it */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0x20000000;
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0x20000000;
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/* reset our buffer pointer, so new commands will be placed at the
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* beginning of the buffer. */
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si->engine.dma.current = 0;
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@ -1368,7 +1368,7 @@ static void nv_acc_cmd_dma(uint32 cmd, uint16 offset, uint16 size)
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/* note also:
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* this system uses auto-increments for the FIFO offset adresses. Make sure
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* to set a new adress if a gap exists between the previous one and the new one. */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = ((size << 18) |
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = ((size << 18) |
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((si->engine.fifo.ch_ptr[cmd] + offset) & 0x0000fffc));
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/* space left after issuing the current command is the cmd AND it's arguments less */
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@ -1378,9 +1378,9 @@ static void nv_acc_cmd_dma(uint32 cmd, uint16 offset, uint16 size)
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static void nv_acc_set_ch_dma(uint16 ch, uint32 handle)
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{
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/* issue FIFO channel assign cmd */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = ((1 << 18) | ch);
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = ((1 << 18) | ch);
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/* set new assignment */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = (0x80000000 | handle);
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = (0x80000000 | handle);
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/* space left after issuing the current command is the cmd AND it's arguments less */
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si->engine.dma.free -= 2;
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@ -1484,7 +1484,7 @@ void SCREEN_TO_SCREEN_BLIT_DMA(engine_token *et, blit_params *list, uint32 count
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if (nv_acc_fifofree_dma(2) != B_OK) return;
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/* now setup ROP (writing 2 32bit words) for GXcopy */
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nv_acc_cmd_dma(NV_ROP5_SOLID, NV_ROP5_SOLID_SETROP5, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0xcc; /* SetRop5 */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0xcc; /* SetRop5 */
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/*** do each blit ***/
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/* Note:
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@ -1504,11 +1504,11 @@ void SCREEN_TO_SCREEN_BLIT_DMA(engine_token *et, blit_params *list, uint32 count
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{
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/* now setup blit (writing 4 32bit words) */
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nv_acc_cmd_dma(NV_IMAGE_BLIT, NV_IMAGE_BLIT_SOURCEORG, 3);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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(((list[i].src_top) << 16) | (list[i].src_left)); /* SourceOrg */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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(((list[i].dest_top) << 16) | (list[i].dest_left)); /* DestOrg */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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((((list[i].height) + 1) << 16) | ((list[i].width) + 1)); /* HeightWidth */
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i++;
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@ -1532,10 +1532,10 @@ void FILL_RECTANGLE_DMA(engine_token *et, uint32 colorIndex, fill_rect_params *l
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if (nv_acc_fifofree_dma(4) != B_OK) return;
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/* now setup ROP (writing 2 32bit words) for GXcopy */
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nv_acc_cmd_dma(NV_ROP5_SOLID, NV_ROP5_SOLID_SETROP5, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0xcc; /* SetRop5 */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0xcc; /* SetRop5 */
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/* now setup fill color (writing 2 32bit words) */
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nv_acc_cmd_dma(NV4_GDI_RECTANGLE_TEXT, NV4_GDI_RECTANGLE_TEXT_COLOR1A, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = colorIndex; /* Color1A */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = colorIndex; /* Color1A */
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/*** draw each rectangle ***/
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while (count)
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@ -1554,9 +1554,9 @@ void FILL_RECTANGLE_DMA(engine_token *et, uint32 colorIndex, fill_rect_params *l
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/* ... and send multiple rects (engine cmd supports 32 max) */
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while (subcnt--)
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{
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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(((list[i].left) << 16) | ((list[i].top) & 0x0000ffff)); /* Unclipped Rect 0 LeftTop */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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(((((list[i].right)+1) - (list[i].left)) << 16) |
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(((list[i].bottom-list[i].top)+1) & 0x0000ffff)); /* Unclipped Rect 0 WidthHeight */
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@ -1581,10 +1581,10 @@ void FILL_SPAN_DMA(engine_token *et, uint32 colorIndex, uint16 *list, uint32 cou
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if (nv_acc_fifofree_dma(4) != B_OK) return;
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/* now setup ROP (writing 2 32bit words) for GXcopy */
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nv_acc_cmd_dma(NV_ROP5_SOLID, NV_ROP5_SOLID_SETROP5, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0xcc; /* SetRop5 */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0xcc; /* SetRop5 */
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/* now setup fill color (writing 2 32bit words) */
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nv_acc_cmd_dma(NV4_GDI_RECTANGLE_TEXT, NV4_GDI_RECTANGLE_TEXT_COLOR1A, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = colorIndex; /* Color1A */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = colorIndex; /* Color1A */
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/*** draw each span ***/
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while (count)
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@ -1603,9 +1603,9 @@ void FILL_SPAN_DMA(engine_token *et, uint32 colorIndex, uint16 *list, uint32 cou
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/* ... and send multiple rects (spans) (engine cmd supports 32 max) */
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while (subcnt--)
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{
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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(((list[i+1]) << 16) | ((list[i]) & 0x0000ffff)); /* Unclipped Rect 0 LeftTop */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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((((list[i+2]+1) - (list[i+1])) << 16) | 0x00000001); /* Unclipped Rect 0 WidthHeight */
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i+=3;
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@ -1629,10 +1629,10 @@ void INVERT_RECTANGLE_DMA(engine_token *et, fill_rect_params *list, uint32 count
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if (nv_acc_fifofree_dma(4) != B_OK) return;
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/* now setup ROP (writing 2 32bit words) for GXinvert */
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nv_acc_cmd_dma(NV_ROP5_SOLID, NV_ROP5_SOLID_SETROP5, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0x55; /* SetRop5 */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0x55; /* SetRop5 */
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/* now reset fill color (writing 2 32bit words) */
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nv_acc_cmd_dma(NV4_GDI_RECTANGLE_TEXT, NV4_GDI_RECTANGLE_TEXT_COLOR1A, 1);
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si->engine.dma.cmdbuffer[si->engine.dma.current++] = 0x00000000; /* Color1A */
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] = 0x00000000; /* Color1A */
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/*** invert each rectangle ***/
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while (count)
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@ -1651,9 +1651,9 @@ void INVERT_RECTANGLE_DMA(engine_token *et, fill_rect_params *list, uint32 count
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/* ... and send multiple rects (engine cmd supports 32 max) */
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while (subcnt--)
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{
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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(((list[i].left) << 16) | ((list[i].top) & 0x0000ffff)); /* Unclipped Rect 0 LeftTop */
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si->engine.dma.cmdbuffer[si->engine.dma.current++] =
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((uint32*)(si->dma_buffer))[si->engine.dma.current++] =
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(((((list[i].right)+1) - (list[i].left)) << 16) |
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(((list[i].bottom-list[i].top)+1) & 0x0000ffff)); /* Unclipped Rect 0 WidthHeight */
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