Fixed UHCI for x86_64.
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44672ada83
commit
2997a19125
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@ -71,9 +71,9 @@ if $(HAIKU_ATA_STACK) = 1 {
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AddFilesToHaikuImage system add-ons kernel busses scsi
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: ahci ;
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AddFilesToHaikuImage system add-ons kernel busses usb
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: <usb>ehci ;
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: <usb>uhci <usb>ehci ;
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AddFilesToHaikuImage system add-ons kernel debugger
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: <kdebug>demangle ;
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: <kdebug>demangle <kdebug>invalidate_on_exit <kdebug>usb_keyboard ;
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AddFilesToHaikuImage system add-ons kernel file_systems
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: $(SYSTEM_ADD_ONS_FILE_SYSTEMS) ;
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AddFilesToHaikuImage system add-ons kernel generic
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@ -232,7 +232,7 @@ AddFilesToHaikuImage system : haiku_loader ;
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# boot module links
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AddBootModuleSymlinksToHaikuImage
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$(ATA_ONLY)ata pci config_manager dpc scsi usb $(ATA_ONLY)ata_adapter
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locked_pool scsi_periph ahci generic_ide_pci <usb>ehci
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locked_pool scsi_periph ahci generic_ide_pci <usb>uhci <usb>ehci
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scsi_cd scsi_disk usb_disk
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intel
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bfs
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@ -146,7 +146,8 @@ void
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print_descriptor_chain(uhci_td *descriptor)
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{
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while (descriptor) {
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dprintf("ph: 0x%08lx; lp: 0x%08lx; vf: %s; q: %s; t: %s; st: 0x%08lx; to: 0x%08lx\n",
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dprintf("ph: 0x%08" B_PRIx32 "; lp: 0x%08" B_PRIx32 "; vf: %s; q: %s; "
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"t: %s; st: 0x%08" B_PRIx32 "; to: 0x%08" B_PRIx32 "\n",
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descriptor->this_phy & 0xffffffff, descriptor->link_phy & 0xfffffff0,
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descriptor->link_phy & 0x4 ? "y" : "n",
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descriptor->link_phy & 0x2 ? "qh" : "td",
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@ -174,13 +175,13 @@ Queue::Queue(Stack *stack)
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mutex_init(&fLock, "uhci queue lock");
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void *physicalAddress;
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phys_addr_t physicalAddress;
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fStatus = fStack->AllocateChunk((void **)&fQueueHead, &physicalAddress,
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sizeof(uhci_qh));
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if (fStatus < B_OK)
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return;
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fQueueHead->this_phy = (addr_t)physicalAddress;
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fQueueHead->this_phy = (uint32)physicalAddress;
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fQueueHead->element_phy = QH_TERMINATE;
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fStrayDescriptor = NULL;
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@ -193,10 +194,10 @@ Queue::~Queue()
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Lock();
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mutex_destroy(&fLock);
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fStack->FreeChunk(fQueueHead, (void *)fQueueHead->this_phy, sizeof(uhci_qh));
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fStack->FreeChunk(fQueueHead, fQueueHead->this_phy, sizeof(uhci_qh));
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if (fStrayDescriptor)
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fStack->FreeChunk(fStrayDescriptor, (void *)fStrayDescriptor->this_phy,
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fStack->FreeChunk(fStrayDescriptor, fStrayDescriptor->this_phy,
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sizeof(uhci_td));
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}
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@ -244,7 +245,7 @@ Queue::TerminateByStrayDescriptor()
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{
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// According to the *BSD USB sources, there needs to be a stray transfer
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// descriptor in order to get some chipset to work nicely (like the PIIX).
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void *physicalAddress;
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phys_addr_t physicalAddress;
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status_t result = fStack->AllocateChunk((void **)&fStrayDescriptor,
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&physicalAddress, sizeof(uhci_td));
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if (result < B_OK) {
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@ -253,7 +254,7 @@ Queue::TerminateByStrayDescriptor()
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}
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fStrayDescriptor->status = 0;
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fStrayDescriptor->this_phy = (addr_t)physicalAddress;
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fStrayDescriptor->this_phy = (uint32)physicalAddress;
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fStrayDescriptor->link_phy = TD_TERMINATE;
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fStrayDescriptor->link_log = NULL;
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fStrayDescriptor->buffer_phy = 0;
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@ -263,7 +264,7 @@ Queue::TerminateByStrayDescriptor()
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| (0x7f << TD_TOKEN_DEVADDR_SHIFT) | TD_TOKEN_IN;
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if (!Lock()) {
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fStack->FreeChunk(fStrayDescriptor, (void *)fStrayDescriptor->this_phy,
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fStack->FreeChunk(fStrayDescriptor, fStrayDescriptor->this_phy,
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sizeof(uhci_td));
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return B_ERROR;
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}
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@ -346,7 +347,7 @@ Queue::RemoveTransfer(uhci_qh *transfer, bool lock)
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}
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addr_t
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uint32
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Queue::PhysicalAddress()
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{
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return fQueueHead->this_phy;
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@ -358,8 +359,14 @@ Queue::PrintToStream()
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{
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#ifdef TRACE_USB
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TRACE("queue:\n");
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dprintf("link phy: 0x%08lx; link type: %s; terminate: %s\n", fQueueHead->link_phy & 0xfff0, fQueueHead->link_phy & 0x0002 ? "QH" : "TD", fQueueHead->link_phy & 0x0001 ? "yes" : "no");
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dprintf("elem phy: 0x%08lx; elem type: %s; terminate: %s\n", fQueueHead->element_phy & 0xfff0, fQueueHead->element_phy & 0x0002 ? "QH" : "TD", fQueueHead->element_phy & 0x0001 ? "yes" : "no");
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dprintf("link phy: 0x%08" B_PRIx32 "; link type: %s; terminate: %s\n",
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fQueueHead->link_phy & 0xfff0,
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fQueueHead->link_phy & 0x0002 ? "QH" : "TD",
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fQueueHead->link_phy & 0x0001 ? "yes" : "no");
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dprintf("elem phy: 0x%08" B_PRIx32 "; elem type: %s; terminate: %s\n",
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fQueueHead->element_phy & 0xfff0,
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fQueueHead->element_phy & 0x0002 ? "QH" : "TD",
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fQueueHead->element_phy & 0x0001 ? "yes" : "no");
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#endif
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}
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@ -413,11 +420,11 @@ UHCI::UHCI(pci_info *info, Stack *stack)
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fRegisterBase = sPCIModule->read_pci_config(fPCIInfo->bus,
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fPCIInfo->device, fPCIInfo->function, PCI_memory_base, 4);
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fRegisterBase &= PCI_address_io_mask;
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TRACE("iospace offset: 0x%08lx\n", fRegisterBase);
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TRACE("iospace offset: 0x%08" B_PRIx32 "\n", fRegisterBase);
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if (fRegisterBase == 0) {
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fRegisterBase = fPCIInfo->u.h0.base_registers[0];
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TRACE_ALWAYS("register base: 0x%08lx\n", fRegisterBase);
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TRACE_ALWAYS("register base: 0x%08" B_PRIx32 "\n", fRegisterBase);
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}
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// enable pci address access
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@ -444,9 +451,9 @@ UHCI::UHCI(pci_info *info, Stack *stack)
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}
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// Setup the frame list
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void *physicalAddress;
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fFrameArea = fStack->AllocateArea((void **)&fFrameList,
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(void **)&physicalAddress, 4096, "USB UHCI framelist");
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phys_addr_t physicalAddress;
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fFrameArea = fStack->AllocateArea((void **)&fFrameList, &physicalAddress,
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4096, "USB UHCI framelist");
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if (fFrameArea < B_OK) {
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TRACE_ERROR("unable to create an area for the frame pointer list\n");
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@ -641,7 +648,7 @@ UHCI::Start()
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bool running = false;
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for (int32 i = 0; i < 10; i++) {
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uint16 status = ReadReg16(UHCI_USBSTS);
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TRACE("current loop %ld, status 0x%04x\n", i, status);
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TRACE("current loop %" B_PRId32 ", status 0x%04x\n", i, status);
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if (status & UHCI_USBSTS_HCHALT)
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snooze(10000);
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@ -1149,7 +1156,7 @@ UHCI::SubmitIsochronous(Transfer *transfer)
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}
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}
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TRACE("isochronous submitted size=%ld bytes, TDs=%ld, "
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TRACE("isochronous submitted size=%ld bytes, TDs=%" B_PRId32 ", "
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"packetSize=%ld, restSize=%ld\n", transfer->DataLength(),
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isochronousData->packet_count, packetSize, restSize);
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@ -1328,8 +1335,8 @@ UHCI::FinishTransfers()
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continue;
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TRACE("finishing transfers (first transfer: 0x%08lx; last"
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" transfer: 0x%08lx)\n", (uint32)fFirstTransfer,
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(uint32)fLastTransfer);
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" transfer: 0x%08lx)\n", (addr_t)fFirstTransfer,
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(addr_t)fLastTransfer);
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transfer_data *lastTransfer = NULL;
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transfer_data *transfer = fFirstTransfer;
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Unlock();
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@ -1343,15 +1350,16 @@ UHCI::FinishTransfers()
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uint32 status = descriptor->status;
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if (status & TD_STATUS_ACTIVE) {
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// still in progress
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TRACE("td (0x%08lx) still active\n", descriptor->this_phy);
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TRACE("td (0x%08" B_PRIx32 ") still active\n",
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descriptor->this_phy);
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break;
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}
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if (status & TD_ERROR_MASK) {
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// an error occured
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TRACE_ERROR("td (0x%08lx) error: status: 0x%08lx;"
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" token: 0x%08lx;\n", descriptor->this_phy, status,
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descriptor->token);
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TRACE_ERROR("td (0x%08" B_PRIx32 ") error: status: 0x%08"
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B_PRIx32 "; token: 0x%08" B_PRIx32 ";\n",
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descriptor->this_phy, status, descriptor->token);
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uint8 errorCount = status >> TD_ERROR_COUNT_SHIFT;
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errorCount &= TD_ERROR_COUNT_MASK;
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@ -1396,7 +1404,7 @@ UHCI::FinishTransfers()
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&& uhci_td_actual_length(descriptor)
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< uhci_td_maximum_length(descriptor))) {
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// all descriptors are done, or we have a short packet
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TRACE("td (0x%08lx) ok\n", descriptor->this_phy);
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TRACE("td (0x%08" B_PRIx32 ") ok\n", descriptor->this_phy);
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callbackStatus = B_OK;
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transferDone = true;
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break;
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@ -1919,8 +1927,8 @@ UHCI::AddTo(Stack *stack)
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if (!sPCIModule) {
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status_t status = get_module(B_PCI_MODULE_NAME, (module_info **)&sPCIModule);
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if (status < B_OK) {
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TRACE_MODULE_ERROR("AddTo(): getting pci module failed! 0x%08lx\n",
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status);
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TRACE_MODULE_ERROR("AddTo(): getting pci module failed! 0x%08"
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B_PRIx32 "\n", status);
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return status;
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}
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}
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@ -1956,8 +1964,8 @@ UHCI::AddTo(Stack *stack)
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}
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if (bus->InitCheck() < B_OK) {
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TRACE_MODULE_ERROR("AddTo(): InitCheck() failed 0x%08lx\n",
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bus->InitCheck());
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TRACE_MODULE_ERROR("AddTo(): InitCheck() failed 0x%08" B_PRIx32
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"\n", bus->InitCheck());
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delete bus;
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continue;
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}
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@ -2027,12 +2035,12 @@ uhci_qh *
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UHCI::CreateTransferQueue(uhci_td *descriptor)
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{
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uhci_qh *queueHead;
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void *physicalAddress;
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if (fStack->AllocateChunk((void **)&queueHead,
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&physicalAddress, sizeof(uhci_qh)) < B_OK)
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phys_addr_t physicalAddress;
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if (fStack->AllocateChunk((void **)&queueHead, &physicalAddress,
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sizeof(uhci_qh)) < B_OK)
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return NULL;
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queueHead->this_phy = (addr_t)physicalAddress;
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queueHead->this_phy = (uint32)physicalAddress;
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queueHead->element_phy = descriptor->this_phy;
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return queueHead;
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}
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@ -2044,7 +2052,7 @@ UHCI::FreeTransferQueue(uhci_qh *queueHead)
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if (!queueHead)
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return;
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fStack->FreeChunk(queueHead, (void *)queueHead->this_phy, sizeof(uhci_qh));
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fStack->FreeChunk(queueHead, queueHead->this_phy, sizeof(uhci_qh));
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}
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@ -2052,7 +2060,7 @@ uhci_td *
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UHCI::CreateDescriptor(Pipe *pipe, uint8 direction, size_t bufferSize)
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{
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uhci_td *result;
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void *physicalAddress;
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phys_addr_t physicalAddress;
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if (fStack->AllocateChunk((void **)&result, &physicalAddress,
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sizeof(uhci_td)) < B_OK) {
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@ -2060,7 +2068,7 @@ UHCI::CreateDescriptor(Pipe *pipe, uint8 direction, size_t bufferSize)
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return NULL;
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}
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result->this_phy = (addr_t)physicalAddress;
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result->this_phy = (uint32)physicalAddress;
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result->status = TD_STATUS_ACTIVE;
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if (pipe->Type() & USB_OBJECT_ISO_PIPE)
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result->status |= TD_CONTROL_ISOCHRONOUS;
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@ -2090,12 +2098,13 @@ UHCI::CreateDescriptor(Pipe *pipe, uint8 direction, size_t bufferSize)
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return result;
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}
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if (fStack->AllocateChunk(&result->buffer_log, (void **)&result->buffer_phy,
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if (fStack->AllocateChunk(&result->buffer_log, &physicalAddress,
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bufferSize) < B_OK) {
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TRACE_ERROR("unable to allocate space for the buffer\n");
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fStack->FreeChunk(result, (void *)result->this_phy, sizeof(uhci_td));
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fStack->FreeChunk(result, result->this_phy, sizeof(uhci_td));
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return NULL;
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}
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result->buffer_phy = physicalAddress;
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return result;
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}
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@ -2150,10 +2159,10 @@ UHCI::FreeDescriptor(uhci_td *descriptor)
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if (descriptor->buffer_log) {
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fStack->FreeChunk(descriptor->buffer_log,
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(void *)descriptor->buffer_phy, descriptor->buffer_size);
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descriptor->buffer_phy, descriptor->buffer_size);
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}
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fStack->FreeChunk(descriptor, (void *)descriptor->this_phy, sizeof(uhci_td));
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fStack->FreeChunk(descriptor, descriptor->this_phy, sizeof(uhci_td));
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}
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@ -45,7 +45,7 @@ public:
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status_t RemoveTransfer(uhci_qh *transfer,
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bool lock = true);
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addr_t PhysicalAddress();
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uint32 PhysicalAddress();
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void PrintToStream();
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@ -92,7 +92,7 @@ typedef struct
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uint32 token; // Contains the packet header (where it needs to be sent)
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uint32 buffer_phy; // A pointer to the buffer with the actual packet
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// Software part
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addr_t this_phy; // A physical pointer to this address
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uint32 this_phy; // A physical pointer to this address
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void *link_log; // Pointer to the next logical TD/QT
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void *buffer_log; // Pointer to the logical buffer
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size_t buffer_size; // Size of the buffer
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@ -167,7 +167,7 @@ typedef struct
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uint32 link_phy; // Link to the next TD/QH
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uint32 element_phy; // Pointer to the first element in the queue
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// Software part
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addr_t this_phy; // The physical pointer to this address
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uint32 this_phy; // The physical pointer to this address
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void *link_log; // Pointer to the next logical TD/QH
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} uhci_qh;
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