x86[_64]: Enable NX on non-boot CPUs as soon as possible

This commit is contained in:
Pawel Dziepak 2013-09-14 05:25:56 +02:00 committed by Rene Gollent
parent 0af009d250
commit 278f66b6b1
3 changed files with 18 additions and 17 deletions

View File

@ -753,15 +753,6 @@ arch_cpu_init_percpu(kernel_args* args, int cpu)
}
}
// If availalbe enable NX-bit (No eXecute). Boot CPU can not enable
// NX-bit here since PAE should be enabled first.
if (cpu != 0) {
if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD)) {
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
| IA32_MSR_EFER_NX);
}
}
return B_OK;
}

View File

@ -60,10 +60,8 @@ X86PagingMethod64Bit::Init(kernel_args* args,
fKernelVirtualPML4 = (uint64*)(addr_t)args->arch_args.vir_pgdir;
// if availalbe enable NX-bit (No eXecute)
if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD)) {
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
| IA32_MSR_EFER_NX);
}
if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD))
call_all_cpus_sync(&_EnableExecutionDisable, NULL);
// Ensure that the user half of the address space is clear. This removes
// the temporary identity mapping made by the boot loader.
@ -384,3 +382,11 @@ X86PagingMethod64Bit::PutPageTableEntryInTable(uint64* entry,
SetTableEntry(entry, page);
}
/*static*/ void
X86PagingMethod64Bit::_EnableExecutionDisable(void* dummy, int cpu)
{
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
| IA32_MSR_EFER_NX);
}

View File

@ -149,10 +149,8 @@ struct X86PagingMethodPAE::ToPAESwitcher {
call_all_cpus_sync(&_EnablePAE, (void*)(addr_t)physicalPDPT);
// if availalbe enable NX-bit (No eXecute)
if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD)) {
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
| IA32_MSR_EFER_NX);
}
if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD))
call_all_cpus_sync(&_EnableExecutionDisable, NULL);
// set return values
_virtualPDPT = pdpt;
@ -173,6 +171,12 @@ private:
x86_write_cr4(x86_read_cr4() | IA32_CR4_PAE | IA32_CR4_GLOBAL_PAGES);
}
static void _EnableExecutionDisable(void* dummy, int cpu)
{
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
| IA32_MSR_EFER_NX);
}
void _TranslatePageTable(addr_t virtualBase)
{
page_table_entry* entry = &fPageHole[virtualBase / B_PAGE_SIZE];