x86[_64]: Enable NX on non-boot CPUs as soon as possible
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0af009d250
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278f66b6b1
@ -753,15 +753,6 @@ arch_cpu_init_percpu(kernel_args* args, int cpu)
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}
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}
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// If availalbe enable NX-bit (No eXecute). Boot CPU can not enable
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// NX-bit here since PAE should be enabled first.
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if (cpu != 0) {
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if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD)) {
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x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
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| IA32_MSR_EFER_NX);
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}
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}
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return B_OK;
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}
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@ -60,10 +60,8 @@ X86PagingMethod64Bit::Init(kernel_args* args,
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fKernelVirtualPML4 = (uint64*)(addr_t)args->arch_args.vir_pgdir;
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// if availalbe enable NX-bit (No eXecute)
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if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD)) {
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x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
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| IA32_MSR_EFER_NX);
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}
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if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD))
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call_all_cpus_sync(&_EnableExecutionDisable, NULL);
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// Ensure that the user half of the address space is clear. This removes
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// the temporary identity mapping made by the boot loader.
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@ -384,3 +382,11 @@ X86PagingMethod64Bit::PutPageTableEntryInTable(uint64* entry,
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SetTableEntry(entry, page);
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}
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/*static*/ void
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X86PagingMethod64Bit::_EnableExecutionDisable(void* dummy, int cpu)
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{
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x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
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| IA32_MSR_EFER_NX);
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}
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@ -149,10 +149,8 @@ struct X86PagingMethodPAE::ToPAESwitcher {
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call_all_cpus_sync(&_EnablePAE, (void*)(addr_t)physicalPDPT);
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// if availalbe enable NX-bit (No eXecute)
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if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD)) {
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x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
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| IA32_MSR_EFER_NX);
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}
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if (x86_check_feature(IA32_FEATURE_AMD_EXT_NX, FEATURE_EXT_AMD))
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call_all_cpus_sync(&_EnableExecutionDisable, NULL);
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// set return values
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_virtualPDPT = pdpt;
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@ -173,6 +171,12 @@ private:
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x86_write_cr4(x86_read_cr4() | IA32_CR4_PAE | IA32_CR4_GLOBAL_PAGES);
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}
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static void _EnableExecutionDisable(void* dummy, int cpu)
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{
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x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
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| IA32_MSR_EFER_NX);
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}
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void _TranslatePageTable(addr_t virtualBase)
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{
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page_table_entry* entry = &fPageHole[virtualBase / B_PAGE_SIZE];
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