Reorganized defines in the header.
Deallocate resources correcly in error case. Support for level and edge interrupts. Removed volatile keyword where it's not needed. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42882 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Stefano Ceccherini
parent
bcf13367d4
commit
276a254c1c
@ -14,6 +14,7 @@
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#include <ACPI.h>
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#include <PCI.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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@ -38,6 +39,7 @@ struct hpet_timer_cookie {
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int number;
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int32 irq;
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sem_id sem;
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hpet_timer* timer;
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};
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////////////////////////////////////////////////////////////////////////////////
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@ -92,7 +94,7 @@ hpet_convert_timeout(const bigtime_t &relativeTimeout)
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#define MIN_TIMEOUT 1
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static status_t
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hpet_set_hardware_timer(bigtime_t relativeTimeout, volatile hpet_timer *timer)
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hpet_set_hardware_timer(bigtime_t relativeTimeout, hpet_timer *timer)
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{
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// TODO:
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if (relativeTimeout < MIN_TIMEOUT)
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@ -116,7 +118,7 @@ hpet_set_hardware_timer(bigtime_t relativeTimeout, volatile hpet_timer *timer)
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static status_t
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hpet_clear_hardware_timer(volatile hpet_timer *timer)
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hpet_clear_hardware_timer(hpet_timer *timer)
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{
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// Disable timer interrupt
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timer->config &= ~HPET_CONF_TIMER_INT_ENABLE;
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@ -129,12 +131,14 @@ hpet_timer_interrupt(void *arg)
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{
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//dprintf("HPET timer_interrupt!!!!\n");
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hpet_timer_cookie* hpetCookie = (hpet_timer_cookie*)arg;
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hpet_timer* timer = &sHPETRegs->timer[hpetCookie->number];
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// clear interrupt status
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int32 intStatus = 1 << hpetCookie->number;
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if (sHPETRegs->interrupt_status & intStatus) {
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if (!HPET_GET_CONF_TIMER_INT_IS_LEVEL(timer)
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|| (sHPETRegs->interrupt_status & intStatus)) {
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// clear interrupt status
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sHPETRegs->interrupt_status |= intStatus;
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hpet_clear_hardware_timer(&sHPETRegs->timer[hpetCookie->number]);
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hpet_clear_hardware_timer(timer);
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release_sem_etc(hpetCookie->sem, 1, B_DO_NOT_RESCHEDULE);
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return B_HANDLED_INTERRUPT;
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@ -159,7 +163,7 @@ static status_t
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hpet_set_legacy(bool enabled)
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{
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if (!HPET_IS_LEGACY_CAPABLE(sHPETRegs)) {
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dprintf("hpet_init: HPET doesn't support legacy mode. Skipping.\n");
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dprintf("hpet_init: HPET doesn't support legacy mode.\n");
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return B_NOT_SUPPORTED;
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}
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@ -197,7 +201,7 @@ hpet_dump_timer(volatile struct hpet_timer *timer)
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dprintf("\tTimer type: %s\n",
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timer->config & HPET_CONF_TIMER_TYPE ? "Periodic" : "OneShot");
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dprintf("\tInterrupt Type: %s\n",
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timer->config & HPET_CONF_TIMER_INT_TYPE ? "Level" : "Edge");
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HPET_GET_CONF_TIMER_INT_IS_LEVEL(timer) ? "Level" : "Edge");
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dprintf("\tconfigured IRQ: %lld\n",
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HPET_GET_CONF_TIMER_INT_ROUTE(timer));
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@ -213,7 +217,7 @@ hpet_dump_timer(volatile struct hpet_timer *timer)
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static status_t
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hpet_init_timer(hpet_timer_cookie* cookie)
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{
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volatile struct hpet_timer *timer = &sHPETRegs->timer[cookie->number];
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struct hpet_timer *timer = cookie->timer;
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uint32 interrupts = (uint32)HPET_GET_CAP_TIMER_ROUTE(timer);
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@ -226,9 +230,10 @@ hpet_init_timer(hpet_timer_cookie* cookie)
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}
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}
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if (interrupt == -1)
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if (interrupt == -1) {
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dprintf("hpet_init_timer(): timer can't be routed to any interrupt!")
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return B_ERROR;
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}
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// Non-periodic mode
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timer->config &= ~HPET_CONF_TIMER_TYPE;
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@ -287,10 +292,9 @@ hpet_init()
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sHPETPeriod = HPET_GET_PERIOD(sHPETRegs);
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TRACE(("hpet_init: HPET is at %p.\n"
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"\tVendor ID: %llx, rev: %llx, period: %lld\n"
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"\tin legacy mode: %s\n",
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"\tVendor ID: %llx, rev: %llx, period: %lld\n",
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sHPETRegs, HPET_GET_VENDOR_ID(sHPETRegs), HPET_GET_REVID(sHPETRegs),
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sHPETPeriod, sHPETRegs->config & HPET_CONF_MASK_LEGACY ? "yes" : "no"));
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sHPETPeriod));
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status_t status = hpet_set_enabled(false);
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if (status != B_OK)
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@ -302,8 +306,10 @@ hpet_init()
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uint32 numTimers = HPET_GET_NUM_TIMERS(sHPETRegs) + 1;
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TRACE(("hpet_init: HPET supports %lu timers, and is %s bits wide.\n",
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numTimers, HPET_IS_64BIT(sHPETRegs) ? "64" : "32"));
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TRACE(("hpet_init: HPET supports %lu timers, is %s bits wide, "
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"and is %sin legacy mode.\n",
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numTimers, HPET_IS_64BIT(sHPETRegs) ? "64" : "32",
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sHPETRegs->config & HPET_CONF_MASK_LEGACY ? "" : "not "));
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TRACE(("hpet_init: configuration: 0x%llx, timer_interrupts: 0x%llx\n",
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sHPETRegs->config, sHPETRegs->interrupt_status));
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@ -428,27 +434,44 @@ hpet_open(const char* name, uint32 flags, void** cookie)
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return B_BUSY;
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}
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hpet_timer_cookie* hpetCookie = (hpet_timer_cookie*)malloc(sizeof(hpet_timer_cookie));
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int timerNumber = 2;
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// TODO
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char semName[B_OS_NAME_LENGTH];
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snprintf(semName, B_OS_NAME_LENGTH, "hpet_timer %d sem", timerNumber);
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sem_id sem = create_sem(0, semName);
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if (sem < 0) {
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atomic_add(&sOpenCount, -1);
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return sem;
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}
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hpet_timer_cookie* hpetCookie = (hpet_timer_cookie*)malloc(sizeof(hpet_timer_cookie));
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if (hpetCookie == NULL) {
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delete_sem(sem);
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atomic_add(&sOpenCount, -1);
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return B_NO_MEMORY;
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}
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hpetCookie->number = timerNumber;
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hpetCookie->sem = create_sem(0, "hpet_timer 2 sem");
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hpetCookie->timer = &sHPETRegs->timer[timerNumber];
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hpetCookie->sem = sem;
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set_sem_owner(hpetCookie->sem, B_SYSTEM_TEAM);
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hpet_set_enabled(false);
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status_t status = hpet_init_timer(hpetCookie);
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if (status != B_OK) {
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if (status != B_OK)
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dprintf("hpet_open: initializing timer failed: %s\n", strerror(status));
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return status;
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}
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hpet_set_enabled(true);
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*cookie = hpetCookie;
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if (status != B_OK)
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if (status != B_OK) {
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delete_sem(sem);
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free(hpetCookie);
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atomic_add(&sOpenCount, -1);
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}
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return status;
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}
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@ -12,20 +12,20 @@
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/* Doing it this way is Required since the HPET only supports 32/64-bit aligned reads. */
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/* Global Capability Register Masks */
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#define HPET_CAP_MASK_REVID 0x00000000000000FFULL
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#define HPET_CAP_MASK_REVID 0x00000000000000FFULL
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#define HPET_CAP_MASK_NUMTIMERS 0x0000000000001F00ULL
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#define HPET_CAP_MASK_WIDTH 0x0000000000002000ULL
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#define HPET_CAP_MASK_WIDTH 0x0000000000002000ULL
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#define HPET_CAP_MASK_LEGACY 0x0000000000008000ULL
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#define HPET_CAP_MASK_VENDOR_ID 0x00000000FFFF0000ULL
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#define HPET_CAP_MASK_PERIOD 0xFFFFFFFF00000000ULL
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/* Retrieve Global Capabilities */
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#define HPET_GET_REVID(regs) ((regs)->capabilities & HPET_CAP_MASK_REVID)
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#define HPET_GET_NUM_TIMERS(regs) (((regs)->capabilities & HPET_CAP_MASK_NUMTIMERS) >> 8)
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#define HPET_IS_64BIT(regs) (((regs)->capabilities & HPET_CAP_MASK_WIDTH) >> 13)
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#define HPET_GET_REVID(regs) ((regs)->capabilities & HPET_CAP_MASK_REVID)
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#define HPET_GET_NUM_TIMERS(regs) (((regs)->capabilities & HPET_CAP_MASK_NUMTIMERS) >> 8)
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#define HPET_IS_64BIT(regs) (((regs)->capabilities & HPET_CAP_MASK_WIDTH) >> 13)
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#define HPET_IS_LEGACY_CAPABLE(regs) (((regs)->capabilities & HPET_CAP_MASK_LEGACY) >> 15)
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#define HPET_GET_VENDOR_ID(regs) (((regs)->capabilities & HPET_CAP_MASK_VENDOR_ID) >> 16)
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#define HPET_GET_PERIOD(regs) (((regs)->capabilities & HPET_CAP_MASK_PERIOD) >> 32)
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#define HPET_GET_VENDOR_ID(regs) (((regs)->capabilities & HPET_CAP_MASK_VENDOR_ID) >> 16)
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#define HPET_GET_PERIOD(regs) (((regs)->capabilities & HPET_CAP_MASK_PERIOD) >> 32)
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/* Global Config Register Masks */
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#define HPET_CONF_MASK_ENABLED 0x00000001
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@ -37,20 +37,21 @@
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/* Timer Configuration and Capabilities*/
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#define HPET_CAP_TIMER_MASK 0xFFFFFFFF00000000ULL
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#define HPET_CAP_TIMER_PER_INT 0x00000010UL
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#define HPET_CAP_TIMER_SIZE 0x00000020UL
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#define HPET_CAP_TIMER_FSB_INT_DEL 0x00008000UL
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#define HPET_GET_CAP_TIMER_ROUTE(timer) (((timer)->config & HPET_CAP_TIMER_MASK) >> 32)
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#define HPET_CONF_TIMER_INT_ROUTE_MASK 0x3e00UL
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#define HPET_CONF_TIMER_INT_ROUTE_SHIFT 9
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#define HPET_CONF_TIMER_INT_TYPE 0x00000002UL
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#define HPET_CONF_TIMER_INT_ENABLE 0x00000004UL
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#define HPET_CONF_TIMER_TYPE 0x00000008UL
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#define HPET_CONF_TIMER_VAL_SET 0x00000040UL
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#define HPET_CONF_TIMER_32MODE 0x00000100UL
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#define HPET_CONF_TIMER_FSB_ENABLE 0x00004000UL
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#define HPET_CAP_TIMER_PER_INT 0x00000010UL
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#define HPET_CAP_TIMER_SIZE 0x00000020UL
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#define HPET_CAP_TIMER_FSB_INT_DEL 0x00008000UL
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#define HPET_GET_CAP_TIMER_ROUTE(timer) (((timer)->config & HPET_CAP_TIMER_MASK) >> 32)
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#define HPET_CONF_TIMER_INT_TYPE 0x00000002UL
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#define HPET_CONF_TIMER_INT_ENABLE 0x00000004UL
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#define HPET_CONF_TIMER_TYPE 0x00000008UL
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#define HPET_CONF_TIMER_VAL_SET 0x00000040UL
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#define HPET_CONF_TIMER_32MODE 0x00000100UL
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#define HPET_CONF_TIMER_FSB_ENABLE 0x00004000UL
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#define HPET_GET_CONF_TIMER_INT_ROUTE(timer) (((timer)->config & HPET_CONF_TIMER_INT_ROUTE_MASK) >> HPET_CONF_TIMER_INT_ROUTE_SHIFT)
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#define HPET_GET_CONF_TIMER_INT_IS_LEVEL(timer) (((timer)->config & HPET_CONF_TIMER_INT_TYPE))
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#define ACPI_HPET_SIGNATURE "HPET"
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@ -83,16 +84,16 @@ struct hpet_regs {
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/* Level Tigger: 0 = off, 1 = set by hardware, timer is active */
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/* Edge Trigger: ignored */
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/* Writing 0 will not clear these. Must write 1 again. */
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volatile uint64 reserved3[25];
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uint64 reserved3[25];
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union {
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volatile uint64 counter64; /* R/W */
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volatile uint32 counter32;
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} u0;
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volatile uint64 reserved4;
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uint64 reserved4;
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volatile struct hpet_timer timer[1];
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struct hpet_timer timer[1];
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};
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