pci: added pci_find_extended_capability().
* added PCI Extended Capabilities definitions. * pci_find_capability() parameter offset is now optional.
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@ -196,6 +196,7 @@ struct pci_module_info {
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#define PCI_header_type 0x0e /* (1 byte) header type */
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#define PCI_bist 0x0f /* (1 byte) built-in self-test */
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#define PCI_extended_capability 0x100 /* (4 bytes) extended capability */
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/* ---
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@ -690,6 +691,41 @@ struct pci_module_info {
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#define PCI_cap_id_sata 0x12 /* Serial ATA Capability */
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#define PCI_cap_id_pciaf 0x13 /* PCI Advanced Features */
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/** PCI Extended Capabilities */
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#define PCI_extcap_id(x) (x & 0x0000ffff)
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#define PCI_extcap_version(x) ((x & 0x000f0000) >> 16)
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#define PCI_extcap_next_ptr(x) ((x & 0xfff00000) >> 20)
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#define PCI_extcap_id_aer 0x0001 /* Advanced Error Reporting */
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#define PCI_extcap_id_vc 0x0002 /* Virtual Channel */
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#define PCI_extcap_id_serial 0x0003 /* Serial Number */
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#define PCI_extcap_id_power_budget 0x0004 /* Power Budgeting */
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#define PCI_extcap_id_rcl_decl 0x0005 /* Root Complex Link Declaration */
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#define PCI_extcap_id_rcil_ctl 0x0006 /* Root Complex Internal Link Control */
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#define PCI_extcap_id_rcec_assoc 0x0007 /* Root Complex Event Collector Association */
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#define PCI_extcap_id_mfvc 0x0008 /* MultiFunction Virtual Channel */
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#define PCI_extcap_id_vc2 0x0009 /* Virtual Channel 2 */
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#define PCI_extcap_id_rcrb_header 0x000a /* RCRB Header */
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#define PCI_extcap_id_vendor 0x000b /* Vendor Unique */
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#define PCI_extcap_id_acs 0x000d /* Access Control Services */
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#define PCI_extcap_id_ari 0x000e /* Alternative Routing Id Interpretation */
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#define PCI_extcap_id_ats 0x000f /* Address Translation Services */
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#define PCI_extcap_id_srio_virtual 0x0010 /* Single Root I/O Virtualization */
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#define PCI_extcap_id_mrio_virtual 0x0011 /* Multiple Root I/O Virtual */
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#define PCI_extcap_id_multicast 0x0012 /* Multicast */
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#define PCI_extcap_id_page_request 0x0013 /* Page Request */
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#define PCI_extcap_id_amd 0x0014 /* AMD Reserved */
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#define PCI_extcap_id_resizable_bar 0x0015 /* Resizable Bar */
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#define PCI_extcap_id_dyn_power_alloc 0x0016 /* Dynamic Power Allocation */
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#define PCI_extcap_id_tph_requester 0x0017 /* TPH Requester */
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#define PCI_extcap_id_latency_tolerance 0x0018 /* Latency Tolerance Reporting */
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#define PCI_extcap_id_2ndpcie 0x0019 /* Secondary PCIe */
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#define PCI_extcap_id_pmux 0x001a /* Protocol Multiplexing */
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#define PCI_extcap_id_pasid 0x001b /* Process Address Space Id */
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#define PCI_extcap_id_ln_requester 0x001c /* LN Requester */
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#define PCI_extcap_id_dpc 0x001d /* Downstream Porto Containment */
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#define PCI_extcap_id_l1pm 0x001e /* L1 Power Management Substates */
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/** Power Management Control Status Register settings */
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#define PCI_pm_mask 0x03
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#define PCI_pm_ctrl 0x02
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@ -75,8 +75,8 @@ pci_write_config(uint8 virtualBus, uint8 device, uint8 function, uint8 offset,
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status_t
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pci_find_capability(uchar virtualBus, uchar device, uchar function,
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uchar capID, uchar *offset)
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pci_find_capability(uint8 virtualBus, uint8 device, uint8 function,
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uint8 capID, uint8 *offset)
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{
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uint8 bus;
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uint8 domain;
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@ -87,6 +87,20 @@ pci_find_capability(uchar virtualBus, uchar device, uchar function,
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}
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status_t
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pci_find_extended_capability(uint8 virtualBus, uint8 device, uint8 function,
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uint16 capID, uint16 *offset)
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{
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uint8 bus;
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uint8 domain;
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if (gPCI->ResolveVirtualBus(virtualBus, &domain, &bus) != B_OK)
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return B_ERROR;
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return gPCI->FindExtendedCapability(domain, bus, device, function, capID,
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offset);
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}
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status_t
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pci_reserve_device(uchar virtualBus, uchar device, uchar function,
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const char *driverName, void *nodeCookie)
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@ -1548,14 +1562,10 @@ status_t
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PCI::FindCapability(uint8 domain, uint8 bus, uint8 device, uint8 function,
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uint8 capID, uint8 *offset)
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{
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if (offset == NULL) {
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TRACE_CAP("PCI: FindCapability() ERROR %u:%u:%u capability %#02x offset NULL pointer\n", bus, device, function, capID);
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return B_BAD_VALUE;
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}
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uint16 status = ReadConfig(domain, bus, device, function, PCI_status, 2);
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if (!(status & PCI_status_capabilities)) {
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TRACE_CAP("PCI: find_pci_capability ERROR %u:%u:%u capability %#02x not supported\n", bus, device, function, capID);
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FLOW("PCI: find_pci_capability ERROR %u:%u:%u capability %#02x "
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"not supported\n", bus, device, function, capID);
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return B_ERROR;
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}
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@ -1566,27 +1576,29 @@ PCI::FindCapability(uint8 domain, uint8 bus, uint8 device, uint8 function,
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switch (headerType & PCI_header_type_mask) {
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case PCI_header_type_generic:
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case PCI_header_type_PCI_to_PCI_bridge:
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capPointer = ReadConfig(domain, bus, device, function,
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PCI_capabilities_ptr, 1);
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capPointer = PCI_capabilities_ptr;
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break;
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case PCI_header_type_cardbus:
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capPointer = ReadConfig(domain, bus, device, function,
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PCI_capabilities_ptr_2, 1);
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capPointer = PCI_capabilities_ptr_2;
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break;
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default:
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TRACE_CAP("PCI: find_pci_capability ERROR %u:%u:%u capability %#02x unknown header type\n", bus, device, function, capID);
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TRACE_CAP("PCI: find_pci_capability ERROR %u:%u:%u capability "
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"%#02x unknown header type\n", bus, device, function, capID);
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return B_ERROR;
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}
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capPointer = ReadConfig(domain, bus, device, function, capPointer, 1);
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capPointer &= ~3;
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if (capPointer == 0) {
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TRACE_CAP("PCI: find_pci_capability ERROR %u:%u:%u capability %#02x empty list\n", bus, device, function, capID);
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TRACE_CAP("PCI: find_pci_capability ERROR %u:%u:%u capability %#02x "
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"empty list\n", bus, device, function, capID);
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return B_NAME_NOT_FOUND;
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}
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for (int i = 0; i < 48; i++) {
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if (ReadConfig(domain, bus, device, function, capPointer, 1) == capID) {
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*offset = capPointer;
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if (offset != NULL)
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*offset = capPointer;
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return B_OK;
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}
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@ -1611,6 +1623,51 @@ PCI::FindCapability(PCIDev *device, uint8 capID, uint8 *offset)
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}
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status_t
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PCI::FindExtendedCapability(uint8 domain, uint8 bus, uint8 device,
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uint8 function, uint16 capID, uint16 *offset)
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{
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if (FindCapability(domain, bus, device, function, PCI_cap_id_pcie)
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!= B_OK) {
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FLOW("PCI:FindExtendedCapability ERROR %u:%u:%u capability %#02x "
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"not supported\n", bus, device, function, capID);
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return B_ERROR;
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}
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uint16 capPointer = PCI_extended_capability;
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uint32 capability = ReadConfig(domain, bus, device, function,
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capPointer, 4);
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if (capability == 0 || capability == 0xffffffff)
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return B_NAME_NOT_FOUND;
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for (int i = 0; i < 48; i++) {
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if (PCI_extcap_id(capability) == capID) {
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if (offset != NULL)
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*offset = capPointer;
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return B_OK;
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}
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capPointer = PCI_extcap_next_ptr(capability) & ~3;
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if (capPointer < PCI_extended_capability)
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return B_NAME_NOT_FOUND;
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capability = ReadConfig(domain, bus, device, function,
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capPointer, 4);
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}
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TRACE_CAP("PCI:FindExtendedCapability ERROR %u:%u:%u capability %#04x "
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"circular list\n", bus, device, function, capID);
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return B_ERROR;
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}
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status_t
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PCI::FindExtendedCapability(PCIDev *device, uint16 capID, uint16 *offset)
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{
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return FindExtendedCapability(device->domain, device->bus, device->device,
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device->function, capID, offset);
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}
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PCIDev *
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PCI::FindDevice(uint8 domain, uint8 bus, uint8 device, uint8 function)
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{
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@ -92,9 +92,14 @@ public:
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status_t FindCapability(uint8 domain, uint8 bus,
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uint8 device, uint8 function, uint8 capID,
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uint8 *offset);
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uint8 *offset = NULL);
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status_t FindCapability(PCIDev *device, uint8 capID,
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uint8 *offset);
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uint8 *offset = NULL);
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status_t FindExtendedCapability(uint8 domain, uint8 bus,
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uint8 device, uint8 function, uint16 capID,
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uint16 *offset = NULL);
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status_t FindExtendedCapability(PCIDev *device,
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uint16 capID, uint16 *offset = NULL);
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status_t ResolveVirtualBus(uint8 virtualBus, uint8 *domain,
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uint8 *bus);
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@ -46,7 +46,10 @@ extern "C" {
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void * pci_ram_address(const void *physical_address_in_system_memory);
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status_t pci_find_capability(uchar bus, uchar device, uchar function, uchar cap_id, uchar *offset);
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status_t pci_find_capability(uint8 bus, uint8 device, uint8 function,
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uint8 cap_id, uint8 *offset = NULL);
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status_t pci_find_extended_capability(uint8 bus, uint8 device, uint8 function,
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uint16 cap_id, uint16 *offset = NULL);
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status_t pci_reserve_device(uchar virtualBus, uchar device, uchar function,
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const char *driverName, void *nodeCookie);
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