important testrelease with panel DPMS programming disabled
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7346 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -266,10 +266,6 @@ status_t nv_crtc_set_timing(display_mode target)
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{
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uint32 iscale_x, iscale_y;
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/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink) transmitters */
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//fixme: remove once DPMS confirmed OK!
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// DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));
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/* calculate inverse scaling factors used by hardware in 20.12 format */
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel1_width);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel1_height);
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@ -443,7 +439,8 @@ status_t nv_crtc_dpms(bool display, bool h, bool v)
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/* end synchronous reset if display should be enabled */
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SEQW(RESET, 0x03);
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if (si->ps.tmds1_active)
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds1_active)
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{
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/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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@ -463,7 +460,8 @@ status_t nv_crtc_dpms(bool display, bool h, bool v)
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{
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SEQW(CLKMODE, (temp | 0x20));
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if (si->ps.tmds1_active)
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds1_active)
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{
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/* powerdown both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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@ -249,10 +249,6 @@ status_t nv_crtc2_set_timing(display_mode target)
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{
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uint32 iscale_x, iscale_y;
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/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink) transmitters */
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//fixme: remove once DPMS confirmed OK!
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// DAC2W(FP_DEBUG0, (DAC2R(FP_DEBUG0) & 0xcfffffff));
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/* calculate inverse scaling factors used by hardware in 20.12 format */
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel2_width);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel2_height);
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@ -426,7 +422,8 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v)
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/* end synchronous reset if display should be enabled */
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SEQW(RESET, 0x03);
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if (si->ps.tmds2_active)
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds2_active)
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{
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/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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@ -446,7 +443,8 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v)
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{
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SEQW(CLKMODE, (temp | 0x20));
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if (si->ps.tmds2_active)
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds2_active)
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{
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/* powerdown both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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@ -12,7 +12,7 @@ static status_t nv4_nv10_nv20_dac_pix_pll_find(
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static status_t g100_g400max_dac_sys_pll_find(
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float req_sclk,float * calc_sclk,uint8 * m_result,uint8 * n_result,uint8 * p_result);
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/* see if an analog VGA monitor is connected to DAC */
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/* see if an analog VGA monitor is connected to connector #1 */
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bool nv_dac_crt_connected(void)
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{
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uint32 output, dac;
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@ -43,12 +43,12 @@ bool nv_dac_crt_connected(void)
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if (DACR(TSTCTRL) & 0x10000000)
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{
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present = true;
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LOG(4,("DAC: CRT detected\n"));
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LOG(4,("DAC: CRT detected on connector #1\n"));
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}
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else
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{
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present = false;
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LOG(4,("DAC: no CRT detected\n"));
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LOG(4,("DAC: no CRT detected on connector #1\n"));
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}
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/* kill test signal routing */
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@ -10,14 +10,16 @@
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static status_t nv10_nv20_dac2_pix_pll_find(
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display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test);
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/* see if an analog VGA monitor is connected to DAC */
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/* see if an analog VGA monitor is connected to connector #2 */
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bool nv_dac2_crt_connected()
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{
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uint32 output, dac;
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bool present;
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/* NOTE:
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* NV11 can't do this: It will report DAC1 status instead. */
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* NV11 can't do this: It will report DAC1 status instead because it HAS no
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* actual secondary DAC function. */
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/* (It DOES have a secondary palette RAM and pixelclock PLL though.) */
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/* save output connector setting */
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output = DAC2R(OUTPUT);
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@ -46,12 +48,12 @@ bool nv_dac2_crt_connected()
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if (DAC2R(TSTCTRL) & 0x10000000)
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{
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present = true;
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LOG(4,("DAC2: CRT detected\n"));
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LOG(4,("DAC2: CRT detected on connector #2\n"));
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}
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else
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{
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present = false;
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LOG(4,("DAC2: no CRT detected\n"));
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LOG(4,("DAC2: no CRT detected on connector #2\n"));
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}
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/* kill test signal routing
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@ -80,7 +80,7 @@ status_t nv_general_powerup()
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{
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status_t status;
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LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-16 running.\n"));
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LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-17 running.\n"));
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/* preset no laptop */
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si->ps.laptop = false;
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@ -1028,8 +1028,8 @@ static status_t nv_general_bios_to_powergraphics()
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if (si->ps.secondary_head)
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{
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/* switch overlay engine to CRTC1 */
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/* bit 17: GPU FP port #2 (confirmed NV25, NV28, confirmed not on NV34),
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* bit 16: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34),
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/* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34),
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* bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34),
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* bit 12: overlay engine (all cards),
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* bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28),
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* bit 8: TVout chip #1 (all cards),
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