Updated FreeBSD rtl81xx network driver with the 10.0 release.

Should fix #10412.

Signed-off-by: Pawel Dziepak <pdziepak@quarnos.org>
This commit is contained in:
Michał Siejak 2014-05-29 13:28:49 +02:00 committed by Pawel Dziepak
parent c3a07a5aed
commit 221ea8a17e
4 changed files with 51 additions and 13 deletions

View File

@ -90,6 +90,7 @@ static void rgephy_load_dspcode(struct mii_softc *);
static const struct mii_phydesc rgephys[] = {
MII_PHY_DESC(REALTEK, RTL8169S),
MII_PHY_DESC(REALTEK, RTL8251),
MII_PHY_END
};
@ -406,7 +407,8 @@ rgephy_loop(struct mii_softc *sc)
{
int i;
if (sc->mii_mpd_rev < 2) {
if (sc->mii_mpd_model != MII_MODEL_REALTEK_RTL8251 &&
sc->mii_mpd_rev < 2) {
PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN);
DELAY(1000);
}
@ -439,7 +441,8 @@ rgephy_load_dspcode(struct mii_softc *sc)
{
int val;
if (sc->mii_mpd_rev >= 2)
if (sc->mii_mpd_model == MII_MODEL_REALTEK_RTL8251 ||
sc->mii_mpd_rev >= 2)
return;
PHY_WRITE(sc, 31, 0x0001);

View File

@ -181,7 +181,7 @@ static const struct rl_type re_devs[] = {
{ RT_VENDORID, RT_DEVICEID_8101E, 0,
"RealTek 810xE PCIe 10/100baseTX" },
{ RT_VENDORID, RT_DEVICEID_8168, 0,
"RealTek 8168/8111 B/C/CP/D/DP/E/F PCIe Gigabit Ethernet" },
"RealTek 8168/8111 B/C/CP/D/DP/E/F/G PCIe Gigabit Ethernet" },
{ RT_VENDORID, RT_DEVICEID_8169, 0,
"RealTek 8169/8169S/8169SB(L)/8110S/8110SB(L) Gigabit Ethernet" },
{ RT_VENDORID, RT_DEVICEID_8169SC, 0,
@ -223,6 +223,7 @@ static const struct rl_hwrev re_hwrevs[] = {
{ RL_HWREV_8402, RL_8169, "8402", RL_MTU },
{ RL_HWREV_8105E, RL_8169, "8105E", RL_MTU },
{ RL_HWREV_8105E_SPIN1, RL_8169, "8105E", RL_MTU },
{ RL_HWREV_8106E, RL_8169, "8106E", RL_MTU },
{ RL_HWREV_8168B_SPIN2, RL_8169, "8168", RL_JUMBO_MTU },
{ RL_HWREV_8168B_SPIN3, RL_8169, "8168", RL_JUMBO_MTU },
{ RL_HWREV_8168C, RL_8169, "8168C/8111C", RL_JUMBO_MTU_6K },
@ -232,8 +233,12 @@ static const struct rl_hwrev re_hwrevs[] = {
{ RL_HWREV_8168DP, RL_8169, "8168DP/8111DP", RL_JUMBO_MTU_9K },
{ RL_HWREV_8168E, RL_8169, "8168E/8111E", RL_JUMBO_MTU_9K},
{ RL_HWREV_8168E_VL, RL_8169, "8168E/8111E-VL", RL_JUMBO_MTU_6K},
{ RL_HWREV_8168EP, RL_8169, "8168EP/8111EP", RL_JUMBO_MTU_9K},
{ RL_HWREV_8168F, RL_8169, "8168F/8111F", RL_JUMBO_MTU_9K},
{ RL_HWREV_8168G, RL_8169, "8168G/8111G", RL_JUMBO_MTU_9K},
{ RL_HWREV_8168GU, RL_8169, "8168GU/8111GU", RL_JUMBO_MTU_9K},
{ RL_HWREV_8411, RL_8169, "8411", RL_JUMBO_MTU_9K},
{ RL_HWREV_8411B, RL_8169, "8411B", RL_JUMBO_MTU_9K},
{ 0, 0, NULL, 0 }
};
@ -1321,7 +1326,7 @@ re_attach(device_t dev)
SYS_RES_IRQ, &rid, RF_ACTIVE);
if (sc->rl_irq[i] == NULL) {
device_printf(dev,
"couldn't llocate IRQ resources for "
"couldn't allocate IRQ resources for "
"message %d\n", rid);
error = ENXIO;
goto fail;
@ -1347,8 +1352,8 @@ re_attach(device_t dev)
if ((cap & PCIEM_LINK_CAP_ASPM) != 0) {
ctl = pci_read_config(dev, sc->rl_expcap +
PCIER_LINK_CTL, 2);
if ((ctl & 0x0003) != 0) {
ctl &= ~0x0003;
if ((ctl & PCIEM_LINK_CTL_ASPMC) != 0) {
ctl &= ~PCIEM_LINK_CTL_ASPMC;
pci_write_config(dev, sc->rl_expcap +
PCIER_LINK_CTL, ctl, 2);
device_printf(dev, "ASPM disabled\n");
@ -1367,10 +1372,11 @@ re_attach(device_t dev)
break;
default:
device_printf(dev, "Chip rev. 0x%08x\n", hwrev & 0x7c800000);
sc->rl_macrev = hwrev & 0x00700000;
hwrev &= RL_TXCFG_HWREV;
break;
}
device_printf(dev, "MAC rev. 0x%08x\n", hwrev & 0x00700000);
device_printf(dev, "MAC rev. 0x%08x\n", sc->rl_macrev);
while (hw_rev->rl_desc != NULL) {
if (hw_rev->rl_rev == hwrev) {
sc->rl_type = hw_rev->rl_type;
@ -1408,6 +1414,7 @@ re_attach(device_t dev)
case RL_HWREV_8401E:
case RL_HWREV_8105E:
case RL_HWREV_8105E_SPIN1:
case RL_HWREV_8106E:
sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM |
RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
RL_FLAG_FASTETHER | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD;
@ -1429,7 +1436,7 @@ re_attach(device_t dev)
sc->rl_flags |= RL_FLAG_MACSLEEP;
/* FALLTHROUGH */
case RL_HWREV_8168C:
if ((hwrev & 0x00700000) == 0x00200000)
if (sc->rl_macrev == 0x00200000)
sc->rl_flags |= RL_FLAG_MACSLEEP;
/* FALLTHROUGH */
case RL_HWREV_8168CP:
@ -1455,13 +1462,27 @@ re_attach(device_t dev)
RL_FLAG_WOL_MANLINK;
break;
case RL_HWREV_8168E_VL:
case RL_HWREV_8168EP:
case RL_HWREV_8168F:
case RL_HWREV_8168G:
case RL_HWREV_8411:
case RL_HWREV_8411B:
sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
RL_FLAG_CMDSTOP_WAIT_TXQ | RL_FLAG_WOL_MANLINK;
break;
case RL_HWREV_8168GU:
if (pci_get_device(dev) == RT_DEVICEID_8101E) {
/* RTL8106EUS */
sc->rl_flags |= RL_FLAG_FASTETHER;
} else
sc->rl_flags |= RL_FLAG_JUMBOV2 | RL_FLAG_WOL_MANLINK;
sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
RL_FLAG_AUTOPAD | RL_FLAG_CMDSTOP_WAIT_TXQ;
break;
case RL_HWREV_8169_8110SB:
case RL_HWREV_8169_8110SBL:
case RL_HWREV_8169_8110SC:
@ -1632,7 +1653,7 @@ re_attach(device_t dev)
/*
* Don't enable TSO by default. It is known to generate
* corrupted TCP segments(bad TCP options) under certain
* circumtances.
* circumstances.
*/
ifp->if_hwassist &= ~CSUM_TSO;
ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO);
@ -2784,7 +2805,7 @@ re_encap(struct rl_softc *sc, struct mbuf **m_head)
/*
* Unconditionally enable IP checksum if TCP or UDP
* checksum is required. Otherwise, TCP/UDP checksum
* does't make effects.
* doesn't make effects.
*/
if (((*m_head)->m_pkthdr.csum_flags & RE_CSUM_FEATURES) != 0) {
if ((sc->rl_flags & RL_FLAG_DESCV2) == 0) {
@ -3247,7 +3268,7 @@ re_init_locked(struct rl_softc *sc)
if ((sc->rl_flags & RL_FLAG_JUMBOV2) != 0) {
/*
* For controllers that use new jumbo frame scheme,
* set maximum size of jumbo frame depedning on
* set maximum size of jumbo frame depending on
* controller revisions.
*/
if (ifp->if_mtu > RL_MTU)
@ -3332,7 +3353,9 @@ re_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
switch (command) {
case SIOCSIFMTU:
if (ifr->ifr_mtu < ETHERMIN ||
ifr->ifr_mtu > sc->rl_hwrev->rl_max_mtu) {
ifr->ifr_mtu > sc->rl_hwrev->rl_max_mtu ||
((sc->rl_flags & RL_FLAG_FASTETHER) != 0 &&
ifr->ifr_mtu > RL_MTU)) {
error = EINVAL;
break;
}
@ -3948,7 +3971,7 @@ re_sysctl_stats(SYSCTL_HANDLER_ARGS)
RL_UNLOCK(sc);
if (i == 0) {
device_printf(sc->rl_dev,
"DUMP statistics request timedout\n");
"DUMP statistics request timed out\n");
return (ETIMEDOUT);
}
done:

View File

@ -189,8 +189,13 @@
#define RL_HWREV_8105E 0x40800000
#define RL_HWREV_8105E_SPIN1 0x40C00000
#define RL_HWREV_8402 0x44000000
#define RL_HWREV_8106E 0x44800000
#define RL_HWREV_8168F 0x48000000
#define RL_HWREV_8411 0x48800000
#define RL_HWREV_8168G 0x4C000000
#define RL_HWREV_8168EP 0x50000000
#define RL_HWREV_8168GU 0x50800000
#define RL_HWREV_8411B 0x5C800000
#define RL_HWREV_8139 0x60000000
#define RL_HWREV_8139A 0x70000000
#define RL_HWREV_8139AG 0x70800000
@ -877,6 +882,7 @@ struct rl_softc {
bus_dma_tag_t rl_parent_tag;
uint8_t rl_type;
const struct rl_hwrev *rl_hwrev;
uint32_t rl_macrev;
int rl_eecmd_read;
int rl_eewidth;
int rl_expcap;
@ -1047,6 +1053,11 @@ struct rl_softc {
*/
#define DLINK_DEVICEID_530TXPLUS 0x1300
/*
* D-Link DFE-520TX rev. C1 device ID
*/
#define DLINK_DEVICEID_520TX_REVC1 0x4200
/*
* D-Link DFE-5280T device ID
*/

View File

@ -299,6 +299,7 @@ model yyREALTEK RTL8201L 0x0020 RTL8201L 10/100 media interface
model xxREALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 1000BASE-T media interface
model REALTEK RTL8305SC 0x0005 RTL8305SC 10/100 802.1q switch
model REALTEK RTL8201E 0x0008 RTL8201E 10/100 media interface
model REALTEK RTL8251 0x0000 RTL8251 1000BASE-T media interface
model REALTEK RTL8169S 0x0011 RTL8169S/8110S/8211 1000BASE-T media interface
/* Seeq Seeq PHYs */