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RISCV64VMTranslationMap: add missing instruction cache invalidation

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Change-Id: Ie4081a3642e5de84865895e81aaa28f090b2c5eb
Reviewed-on: https://review.haiku-os.org/c/haiku/+/6216
Tested-by: Automation <automation@haiku-os.org>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
This commit is contained in:
X512 2023-03-17 20:12:28 +09:00 committed by waddlesplash
parent 6d13693a78
commit 1e4146cbc6
1 changed files with 3 additions and 1 deletions
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4
src/system/kernel/arch/riscv64/RISCV64VMTranslationMap.cpp
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@ -327,8 +327,10 @@ RISCV64VMTranslationMap::Map(addr_t virtualAddress, phys_addr_t physicalAddress,
newPte.flags |= (1 << pteRead);
if ((attributes & B_WRITE_AREA) != 0)
newPte.flags |= (1 << pteWrite);
if ((attributes & B_EXECUTE_AREA) != 0)
if ((attributes & B_EXECUTE_AREA) != 0) {
newPte.flags |= (1 << pteExec);
fInvalidCode = true;
}
} else {
if ((attributes & B_KERNEL_READ_AREA) != 0)
newPte.flags |= (1 << pteRead);