From 1e4146cbc6b8dc6c968cc830b8981d5842694f60 Mon Sep 17 00:00:00 2001 From: X512 Date: Fri, 17 Mar 2023 20:12:28 +0900 Subject: [PATCH] RISCV64VMTranslationMap: add missing instruction cache invalidation Change-Id: Ie4081a3642e5de84865895e81aaa28f090b2c5eb Reviewed-on: https://review.haiku-os.org/c/haiku/+/6216 Tested-by: Automation Reviewed-by: Alex von Gluck IV --- src/system/kernel/arch/riscv64/RISCV64VMTranslationMap.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/system/kernel/arch/riscv64/RISCV64VMTranslationMap.cpp b/src/system/kernel/arch/riscv64/RISCV64VMTranslationMap.cpp index 4b1cf16570..b00e98bda2 100644 --- a/src/system/kernel/arch/riscv64/RISCV64VMTranslationMap.cpp +++ b/src/system/kernel/arch/riscv64/RISCV64VMTranslationMap.cpp @@ -327,8 +327,10 @@ RISCV64VMTranslationMap::Map(addr_t virtualAddress, phys_addr_t physicalAddress, newPte.flags |= (1 << pteRead); if ((attributes & B_WRITE_AREA) != 0) newPte.flags |= (1 << pteWrite); - if ((attributes & B_EXECUTE_AREA) != 0) + if ((attributes & B_EXECUTE_AREA) != 0) { newPte.flags |= (1 << pteExec); + fInvalidCode = true; + } } else { if ((attributes & B_KERNEL_READ_AREA) != 0) newPte.flags |= (1 << pteRead);