* Call PostReset() at the end of ResetPort() as it's always used in that way.
* Reset the port directly after executing a command failed instead of letting the next call do the reset first. This is arbitrary but looks cleaner to me. * Provide a way to check if a given sata_request is a SCSI_OP_TEST_UNIT_READY over ATAPI and use this info to calm down all error output. This avoids spamming the syslog with error output on each media status poll when no disk is present in a ATAPI device. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@31014 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Michael Lotz
parent
46d4d11ff6
commit
1d4c4d3a5b
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@ -43,6 +43,7 @@ AHCIPort::AHCIPort(AHCIController *controller, int index)
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fSectorSize(0),
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fSectorCount(0),
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fIsATAPI(false),
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fTestUnitReadyActive(false),
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fResetPort(false),
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fError(false)
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{
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@ -140,7 +141,6 @@ AHCIPort::Init2()
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FlushPostedWrites();
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ResetPort(true);
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PostReset();
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TRACE("ie 0x%08lx\n", fRegs->ie);
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TRACE("is 0x%08lx\n", fRegs->is);
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@ -233,7 +233,8 @@ AHCIPort::ResetDevice()
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status_t
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AHCIPort::ResetPort(bool forceDeviceReset)
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{
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TRACE("AHCIPort::ResetPort port %d\n", fIndex);
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if (!fTestUnitReadyActive)
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TRACE("AHCIPort::ResetPort port %d\n", fIndex);
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// stop DMA engine
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fRegs->cmd &= ~PORT_CMD_ST;
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@ -246,8 +247,10 @@ AHCIPort::ResetPort(bool forceDeviceReset)
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bool deviceBusy = fRegs->tfd & (ATA_BSY | ATA_DRQ);
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TRACE("AHCIPort::ResetPort port %d, deviceBusy %d, forceDeviceReset %d\n",
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fIndex, deviceBusy, forceDeviceReset);
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if (!fTestUnitReadyActive) {
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TRACE("AHCIPort::ResetPort port %d, deviceBusy %d, "
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"forceDeviceReset %d\n", fIndex, deviceBusy, forceDeviceReset);
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}
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if (deviceBusy || forceDeviceReset)
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ResetDevice();
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@ -256,14 +259,15 @@ AHCIPort::ResetPort(bool forceDeviceReset)
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fRegs->cmd |= PORT_CMD_ST;
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FlushPostedWrites();
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return B_OK;
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return PostReset();
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}
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status_t
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AHCIPort::PostReset()
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{
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TRACE("AHCIPort::PostReset port %d\n", fIndex);
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if (!fTestUnitReadyActive)
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TRACE("AHCIPort::PostReset port %d\n", fIndex);
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if ((fRegs->ssts & 0xf) != 0x3 || (fRegs->tfd & 0xff) == 0x7f) {
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TRACE("AHCIPort::PostReset port %d: no device\n", fIndex);
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@ -289,9 +293,11 @@ AHCIPort::PostReset()
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fRegs->cmd &= ~PORT_CMD_ATAPI;
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FlushPostedWrites();
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TRACE("device signature 0x%08lx (%s)\n", fRegs->sig,
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(fRegs->sig == 0xeb140101) ? "ATAPI" : (fRegs->sig == 0x00000101) ?
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"ATA" : "unknown");
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if (!fTestUnitReadyActive) {
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TRACE("device signature 0x%08lx (%s)\n", fRegs->sig,
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(fRegs->sig == 0xeb140101) ? "ATAPI" : (fRegs->sig == 0x00000101) ?
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"ATA" : "unknown");
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}
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return B_OK;
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}
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@ -345,20 +351,25 @@ AHCIPort::InterruptErrorHandler(uint32 is)
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{
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uint32 ci = fRegs->ci;
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TRACE("AHCIPort::InterruptErrorHandler port %d, fCommandsActive 0x%08lx, "
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"is 0x%08lx, ci 0x%08lx\n", fIndex, fCommandsActive, is, ci);
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if (!fTestUnitReadyActive) {
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TRACE("AHCIPort::InterruptErrorHandler port %d, "
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"fCommandsActive 0x%08lx, is 0x%08lx, ci 0x%08lx\n", fIndex,
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fCommandsActive, is, ci);
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TRACE("ssts 0x%08lx\n", fRegs->ssts);
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TRACE("sctl 0x%08lx\n", fRegs->sctl);
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TRACE("serr 0x%08lx\n", fRegs->serr);
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TRACE("sact 0x%08lx\n", fRegs->sact);
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TRACE("ssts 0x%08lx\n", fRegs->ssts);
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TRACE("sctl 0x%08lx\n", fRegs->sctl);
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TRACE("serr 0x%08lx\n", fRegs->serr);
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TRACE("sact 0x%08lx\n", fRegs->sact);
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}
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// read and clear SError
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uint32 serr = fRegs->serr;
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fRegs->serr = serr;
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if (is & PORT_INT_TFE) {
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TRACE("Task File Error\n");
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if (!fTestUnitReadyActive)
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TRACE("Task File Error\n");
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fResetPort = true;
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fError = true;
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}
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@ -740,6 +751,7 @@ AHCIPort::ExecuteSataRequest(sata_request *request, bool isWrite)
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fCommandList->cfl = 5; // 20 bytes, length in DWORDS
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memcpy((char *)fCommandTable->cfis, request->fis(), 20);
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fTestUnitReadyActive = request->is_test_unit_ready();
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if (request->is_atapi()) {
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// ATAPI PACKET is a 12 or 16 byte SCSI command
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memset((char *)fCommandTable->acmd, 0, 32);
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@ -755,7 +767,7 @@ AHCIPort::ExecuteSataRequest(sata_request *request, bool isWrite)
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if (wait_until_clear(&fRegs->tfd, ATA_BSY | ATA_DRQ, 1000000) < B_OK) {
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TRACE("ExecuteAtaRequest port %d: device is busy\n", fIndex);
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fResetPort = true;
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ResetPort();
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FinishTransfer();
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request->abort();
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return;
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@ -763,9 +775,9 @@ AHCIPort::ExecuteSataRequest(sata_request *request, bool isWrite)
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cpu_status cpu = disable_interrupts();
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acquire_spinlock(&fSpinlock);
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fCommandsActive |= 1;
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fRegs->ci = 1;
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FlushPostedWrites();
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fCommandsActive |= 1;
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release_spinlock(&fSpinlock);
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restore_interrupts(cpu);
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@ -790,13 +802,17 @@ AHCIPort::ExecuteSataRequest(sata_request *request, bool isWrite)
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TRACE("tfd 0x%08lx\n", fRegs->tfd);
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*/
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if (fResetPort || status == B_TIMED_OUT) {
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fResetPort = false;
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ResetPort();
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}
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size_t bytesTransfered = fCommandList->prdbc;
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FinishTransfer();
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if (status == B_TIMED_OUT) {
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TRACE("ExecuteAtaRequest port %d: device timeout\n", fIndex);
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fResetPort = true;
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request->abort();
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} else {
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request->finish(tfd, bytesTransfered);
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@ -807,12 +823,6 @@ AHCIPort::ExecuteSataRequest(sata_request *request, bool isWrite)
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void
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AHCIPort::ScsiExecuteRequest(scsi_ccb *request)
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{
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if (fResetPort) {
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fResetPort = false;
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ResetPort();
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PostReset();
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}
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// TRACE("AHCIPort::ScsiExecuteRequest port %d, opcode 0x%02x, length %u\n", fIndex, request->cdb[0], request->cdb_length);
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if (fIsATAPI && request->cdb[0] != SCSI_OP_INQUIRY) {
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@ -67,6 +67,7 @@ private:
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uint32 fSectorSize;
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uint64 fSectorCount;
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bool fIsATAPI;
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bool fTestUnitReadyActive;
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bool fResetPort;
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bool fError;
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@ -105,8 +105,13 @@ sata_request::finish(int tfd, size_t bytesTransfered)
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if (tfd & (ATA_ERR | ATA_DF)) {
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uint8 status = tfd & 0xff;
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uint8 error = (tfd >> 8) & 0xff;
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dprintf("ahci: sata_request::finish ATA command 0x%02x failed\n", fFis[2]);
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dprintf("ahci: sata_request::finish status 0x%02x, error 0x%02x\n", status, error);
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if (!is_test_unit_ready()) {
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dprintf("ahci: sata_request::finish ATA command 0x%02x failed\n",
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fFis[2]);
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dprintf("ahci: sata_request::finish status 0x%02x, error 0x%02x\n",
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status, error);
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}
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}
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if (fCcb) {
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@ -116,13 +121,16 @@ sata_request::finish(int tfd, size_t bytesTransfered)
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if (tfd & (ATA_ERR | ATA_DF)) {
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fCcb->subsys_status = SCSI_REQ_CMP_ERR;
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if (fIsATAPI) {
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dprintf("ahci: sata_request::finish ATAPI packet %02x %02x %02x %02x "
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if (!is_test_unit_ready()) {
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dprintf("ahci: sata_request::finish ATAPI packet %02x %02x %02x %02x "
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"%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x (len %d)\n",
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fCcb->cdb[0], fCcb->cdb[1], fCcb->cdb[2], fCcb->cdb[3],
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fCcb->cdb[4], fCcb->cdb[5], fCcb->cdb[6], fCcb->cdb[7],
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fCcb->cdb[8], fCcb->cdb[9], fCcb->cdb[10], fCcb->cdb[11],
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fCcb->cdb[12], fCcb->cdb[13], fCcb->cdb[14], fCcb->cdb[15],
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fCcb->cdb_length);
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}
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fCcb->device_status = SCSI_STATUS_CHECK_CONDITION;
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} else {
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// TODO ATA error handling goes here
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@ -6,6 +6,7 @@
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#define _SATA_REQUEST_H
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#include "ahci_defs.h"
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#include "scsi_cmds.h"
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class sata_request
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{
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@ -22,6 +23,7 @@ public:
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void set_atapi_cmd(size_t transferLength);
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bool is_atapi();
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bool is_test_unit_ready();
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scsi_ccb * ccb();
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const void * fis();
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@ -65,6 +67,13 @@ sata_request::is_atapi()
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}
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inline bool
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sata_request::is_test_unit_ready()
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{
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return fIsATAPI && fCcb != NULL && fCcb->cdb[0] == SCSI_OP_TEST_UNIT_READY;
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}
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inline void *
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sata_request::data()
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{
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