try at workaround early playback interrupts on non intel.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33011 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Jérôme Duval 2009-09-08 22:49:32 +00:00
parent ed20dd306d
commit 1cab92ade6
1 changed files with 11 additions and 4 deletions

View File

@ -45,8 +45,8 @@ static const struct {
{B_SR_96000, MAKE_RATE(48000, 2, 1), 96000}, {B_SR_96000, MAKE_RATE(48000, 2, 1), 96000},
{B_SR_176400, MAKE_RATE(44100, 4, 1), 176400}, {B_SR_176400, MAKE_RATE(44100, 4, 1), 176400},
{B_SR_192000, MAKE_RATE(48000, 4, 1), 192000}, {B_SR_192000, MAKE_RATE(48000, 4, 1), 192000},
// TODO: What about this one? // this one is not supported by hardware.
// {B_SR_384000, MAKE_RATE(44100, ??, ??), 384000}, // {B_SR_384000, MAKE_RATE(44100, ??, ??), 384000},
}; };
@ -114,6 +114,13 @@ stream_handle_interrupt(hda_controller* controller, hda_stream* stream)
stream->frames_count += stream->buffer_length; stream->frames_count += stream->buffer_length;
stream->buffer_cycle = position / bufferSize; stream->buffer_cycle = position / bufferSize;
// playback interrupts come early, offsets don't work on non intel
// TODO find out why
if (stream->type == STREAM_PLAYBACK
&& stream->controller->pci_info.vendor_id != INTEL_VENDORID) {
stream->buffer_cycle++;
}
release_spinlock(&stream->lock); release_spinlock(&stream->lock);
release_sem_etc(controller->buffer_ready_sem, 1, B_DO_NOT_RESCHEDULE); release_sem_etc(controller->buffer_ready_sem, 1, B_DO_NOT_RESCHEDULE);
@ -548,10 +555,10 @@ hda_stream_setup_buffers(hda_audio_group* audioGroup, hda_stream* stream,
// Stream interrupts seem to arrive too early on most HDA // Stream interrupts seem to arrive too early on most HDA
// so we adjust buffer descriptors to take this into account // so we adjust buffer descriptors to take this into account
// TODO check on other vendors, uncomment last line in stream_handle_interrupt() // TODO check on other vendors, see in stream_handle_interrupt()
// Tested only on Intel ICH8 // Tested only on Intel ICH8
uint32 offset = 0; uint32 offset = 0;
if (stream->type == STREAM_PLAYBACK) { if (stream->type == STREAM_PLAYBACK && stream->controller->pci_info.vendor_id == INTEL_VENDORID) {
if (stream->sample_size == 2) if (stream->sample_size == 2)
offset = 6; offset = 6;
else if (stream->sample_size > 2) else if (stream->sample_size > 2)