WIP
Abstracted cpu and mmu version dependant stuff (compatibility where are you) into ops like func arrays. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22821 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
François Revol
parent
5a4ca4d18e
commit
1a8a803ee1
@ -219,11 +219,17 @@ extern bool m68k_set_fault_handler(addr_t *handlerLocation, addr_t handler)
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}
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#endif
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/* flushes insn pipeline */
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#define m68k_nop() asm volatile("nop")
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/* no FC bit needed */
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#define pflush(addr) asm volatile("pflush #0,#0,(%0)" :: "a" (addr))
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#define pflusha() asm volatile("pflusha")
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struct m68k_cpu_ops {
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void (*flush_insn_pipeline)(void);
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void (*flush_atc_all)(void);
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void (*flush_atc_user)(void);
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void (*flush_atc_addr)(void *addr);
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void (*flush_dcache)(void *address, size_t len);
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void (*flush_icache)(void *address, size_t len);
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void (*idle)(void);
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};
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extern struct m68k_cpu_ops cpu_ops;
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//#define
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@ -234,51 +240,56 @@ extern bool m68k_set_fault_handler(addr_t *handlerLocation, addr_t handler)
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#define ppc_sync() asm volatile("sync")
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#define tlbia() asm volatile("tlbia")
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#define tlbie(addr) asm volatile("tlbie %0" :: "r" (addr))
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// PowerPC processor version (the upper 16 bits of the PVR).
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enum m68k_processor_version {
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MPC601 = 0x0001,
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MPC603 = 0x0003,
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MPC604 = 0x0004,
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MPC602 = 0x0005,
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MPC603e = 0x0006,
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MPC603ev = 0x0007,
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MPC750 = 0x0008,
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MPC604ev = 0x0009,
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MPC7400 = 0x000c,
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MPC620 = 0x0014,
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IBM403 = 0x0020,
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IBM401A1 = 0x0021,
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IBM401B2 = 0x0022,
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IBM401C2 = 0x0023,
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IBM401D2 = 0x0024,
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IBM401E2 = 0x0025,
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IBM401F2 = 0x0026,
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IBM401G2 = 0x0027,
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IBMPOWER3 = 0x0041,
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MPC860 = 0x0050,
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MPC8240 = 0x0081,
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IBM405GP = 0x4011,
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IBM405L = 0x4161,
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IBM750FX = 0x7000,
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MPC7450 = 0x8000,
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MPC7455 = 0x8001,
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MPC7457 = 0x8002,
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MPC7447A = 0x8003,
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MPC7448 = 0x8004,
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MPC7410 = 0x800c,
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MPC8245 = 0x8081,
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};
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#endif
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// m68k processor version.
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enum m68k_processor_version {
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/* those two we don't support */
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CPU_68000 = 0x0000,
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CPU_68010 = 0x0001,
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/* maybe with a pmmu and fpu */
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CPU_68020 = 0x0002,
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/* should work */
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CPU_68030 = 0x0003,
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CPU_68040 = 0x0004,
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CPU_68060 = 0x0006,
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/* mask */
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CPU_MASK = 0x000F
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};
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enum m68k_fpu_version {
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/* we don't support */
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FPU_NONE = 0x0000,
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FPU_68881 = 0x0010,
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FPU_68882 = 0x0020,
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FPU_030 = 0x0030,
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FPU_040 = 0x0040,
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FPU_060 = 0x0060,
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FPU_MASK = 0x00F0
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};
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enum m68k_mmu_version {
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MMU_NONE = 0x0000,
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MMU_68551 = 0x0100,
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MMU_68030 = 0x0300,
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MMU_68040 = 0x0400,
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MMU_68060 = 0x0600,
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MMU_MASK = 0x0F00
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};
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extern int arch_cpu_type;
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extern int arch_fpu_type;
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extern int arch_mmu_type;
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extern int arch_platform;
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/*
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Use of (some) special purpose registers.
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XXX: those regs aren't implemented/accessed the same way on different cpus...
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SRP[63-32]: current struct thread*
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SRP[31-0] :
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CAAR : can we use it ??
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MSP :
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PPC:
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SPRG0: per CPU physical address pointer to an ppc_cpu_exception_context
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@ -15,6 +15,10 @@
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// kernel args
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typedef struct {
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int cpu_type;
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int fpu_type;
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int mmu_type;
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int platform;
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// architecture specific
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uint64 cpu_frequency;
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uint64 bus_frequency;
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@ -11,139 +11,114 @@
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#include <arch_cpu.h>
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/*
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* cf.
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* "mc68030 Enhanced 32-bit Microprocessor User's Manual"
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* (3rd edition), Section 9
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* "mc68040 Enhanced 32-bit Microprocessor User's Manual"
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* Section 9
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*
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* The 030 pmmu can support up to 6-level translation tree,
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* each level using an size-selectable index from the
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* virtual address, short (4-bit) and long (8-bit) page table
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* and page entry descriptors, early tree termination, and selectable
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* page size from 256 bytes to 32K.
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* There is optionally a separate Supervisor Root Pointer to separate
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* the user and kernel trees.
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*
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* The 040 pmmu however is way more limited in its abilities.
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* It has a fixed 3-level page tree, with 7/7/6 bit splitting for
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* 4K pages. The opcodes are also different so we will need specific
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* routines. Both supervisor and root pointers must be used so we can't
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* reuse one of them.
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*
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*
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* We settle to:
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* - 1 bit index for the first level to easily split kernel and user
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* part of the tree, with the possibility to force supervisor only for
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* the kernel tree. The use of SRP to point to a 2nd tree is avoided as
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* it is not available on 68060, plus that makes a spare 64bit reg to
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* stuff things in.
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* - 9 bit page directory
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* - 10 bit page tables
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* - 12 bit page index (4K pages, a common value).
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*/
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/*** BAT - block address translation ***/
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enum bat_length {
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BAT_LENGTH_128kB = 0x0000,
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BAT_LENGTH_256kB = 0x0001,
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BAT_LENGTH_512kB = 0x0003,
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BAT_LENGTH_1MB = 0x0007,
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BAT_LENGTH_2MB = 0x000f,
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BAT_LENGTH_4MB = 0x001f,
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BAT_LENGTH_8MB = 0x003f,
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BAT_LENGTH_16MB = 0x007f,
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BAT_LENGTH_32MB = 0x00ff,
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BAT_LENGTH_64MB = 0x01ff,
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BAT_LENGTH_128MB = 0x03ff,
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BAT_LENGTH_256MB = 0x07ff,
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enum descriptor_types {
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DT_INVALID = 0, // invalid entry
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DT_PAGE, // page descriptor
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DT_VALID_4, // short page table descriptor
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DT_VALID_8, // long page table descriptor
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};
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enum bat_protection {
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BAT_READ_ONLY = 1,
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BAT_READ_WRITE = 2,
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#if 0
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/* This is the normal layout of the descriptors, as per documentation.
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* When page size > 256, several bits are unused in the LSB of page
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* addresses, which we can use in addition of other unused bits.
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* the structs dedlared later reflect this for 4K pages.
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*/
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struct short_page_directory_entry {
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// upper 32 bits
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 address : 28;
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};
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struct block_address_translation {
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// upper 32 bit
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uint32 page_index : 15; // BEPI, block effective page index
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uint32 _reserved0 : 4;
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uint32 length : 11;
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uint32 kernel_valid : 1; // Vs, Supervisor-state valid
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uint32 user_valid : 1; // Vp, User-state valid
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// lower 32 bit
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uint32 physical_block_number : 15; // BPRN
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uint32 write_through : 1; // WIMG
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uint32 caching_inhibited : 1;
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uint32 memory_coherent : 1;
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uint32 guarded : 1;
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uint32 _reserved1 : 1;
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uint32 protection : 2;
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block_address_translation()
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{
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Clear();
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}
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void SetVirtualAddress(void *address)
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{
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page_index = uint32(address) >> 17;
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}
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void SetPhysicalAddress(void *address)
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{
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physical_block_number = uint32(address) >> 17;
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}
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void Clear()
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{
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memset((void *)this, 0, sizeof(block_address_translation));
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}
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struct long_page_directory_entry {
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// upper 32 bits
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 _zero1 : 4;
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uint32 supervisor : 1;
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uint32 _zero2 : 1;
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uint32 _ones : 6;
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uint32 limit : 15;
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uint32 low_up : 1; // limit is lower(1)/upper(0)
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// lower 32 bits
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uint32 unused : 4; //
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uint32 address : 28;
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};
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struct segment_descriptor {
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uint32 type : 1; // 0 for page translation descriptors
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uint32 kernel_protection_key : 1; // Ks, Supervisor-state protection key
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uint32 user_protection_key : 1; // Kp, User-state protection key
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uint32 no_execute_protection : 1;
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uint32 _reserved : 4;
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uint32 virtual_segment_id : 24;
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segment_descriptor()
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{
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Clear();
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}
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segment_descriptor(uint32 value)
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{
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*((uint32 *)this) = value;
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}
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void Clear()
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{
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memset((void *)this, 0, sizeof(segment_descriptor));
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}
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struct short_page_table_entry {
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 modified : 1;
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uint32 _zero1 : 1;
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uint32 cache_inhibit : 1;
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uint32 _zero2 : 1;
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uint32 address : 24;
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};
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/*** PTE - page table entry ***/
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enum pte_protection {
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PTE_READ_ONLY = 3,
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PTE_READ_WRITE = 2,
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struct long_page_table_entry {
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// upper 32 bits
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 modified : 1;
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uint32 _zero1 : 1;
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uint32 cache_inhibit : 1;
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uint32 _zero2 : 1;
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uint32 supervisor : 1;
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uint32 _zero3 : 1;
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uint32 _ones : 6;
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// limit only used on early table terminators, else unused
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uint32 limit : 15;
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uint32 low_up : 1; // limit is lower(1)/upper(0)
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// lower 32 bits
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uint32 unused : 8; //
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uint32 address : 24;
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};
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#endif
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struct page_table_entry {
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// upper 32 bit
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uint32 valid : 1;
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uint32 virtual_segment_id : 24;
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uint32 secondary_hash : 1;
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uint32 abbr_page_index : 6;
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// lower 32 bit
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uint32 physical_page_number : 20;
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uint32 _reserved0 : 3;
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uint32 referenced : 1;
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uint32 changed : 1;
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uint32 write_through : 1; // WIMG
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uint32 caching_inhibited : 1;
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uint32 memory_coherent : 1;
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uint32 guarded : 1;
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uint32 _reserved1 : 1;
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uint32 page_protection : 2;
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static uint32 PrimaryHash(uint32 virtualSegmentID, uint32 virtualAddress);
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static uint32 SecondaryHash(uint32 virtualSegmentID, uint32 virtualAddress);
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static uint32 SecondaryHash(uint32 primaryHash);
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};
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struct page_table_entry_group {
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struct page_table_entry entry[8];
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};
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extern void m68k_get_page_table(page_table_entry_group **_pageTable, size_t *_size);
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extern void m68k_set_page_table(page_table_entry_group *pageTable, size_t size);
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static inline segment_descriptor
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m68k_get_segment_register(void *virtualAddress)
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{
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return (segment_descriptor)get_sr(virtualAddress);
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}
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static inline void
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m68k_set_segment_register(void *virtualAddress, segment_descriptor segment)
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{
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set_sr(virtualAddress, *(uint32 *)&segment);
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}
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#endif /* _KERNEL_ARCH_M68K_MMU_H */
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@ -19,6 +19,24 @@ void m68k_push_iframe(struct iframe_stack *stack, struct iframe *frame);
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void m68k_pop_iframe(struct iframe_stack *stack);
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struct iframe *m68k_get_user_iframe(void);
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/* as we won't support SMP on m68k (yet?) we can use a global here */
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extern struct thread *gCurrentThread;
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extern inline struct thread *
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arch_thread_get_current_thread(void)
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{
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return gCurrentThread;
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}
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extern inline void
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arch_thread_set_current_thread(struct thread *t)
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{
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gCurrentThread = t;
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}
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#if 0
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/* this would only work on 030... */
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extern inline struct thread *
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arch_thread_get_current_thread(void)
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@ -37,7 +55,7 @@ arch_thread_set_current_thread(struct thread *t)
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"move %1,(4,%0)\n" \
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"pmove (%0),%%srp" : : "a"(&v), "d"(t));
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}
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#endif
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#ifdef __cplusplus
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}
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@ -12,4 +12,24 @@
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#define PAGE_SHIFT 12
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struct m68k_vm_ops {
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void *(*m68k_translation_map_get_pgdir)(vm_translation_map *map);
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status_t (*arch_vm_translation_map_init_map)(vm_translation_map *map, bool kernel);
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status_t (*arch_vm_translation_map_init_kernel_map_post_sem)(vm_translation_map *map);
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status_t (*arch_vm_translation_map_init)(kernel_args *args);
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status_t (*arch_vm_translation_map_init_post_area)(kernel_args *args);
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status_t (*arch_vm_translation_map_init_post_sem)(kernel_args *args);
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status_t (*arch_vm_translation_map_early_map)(kernel_args *ka, addr_t virtualAddress, addr_t physicalAddress,
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uint8 attributes, addr_t (*get_free_page)(kernel_args *));
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status_t (*arch_vm_translation_map_early_query)(addr_t va, addr_t *out_physical);
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#if 0 /* ppc stuff only ? */
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status_t (*m68k_map_address_range)(addr_t virtualAddress, addr_t physicalAddress,
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size_t size);
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void (*m68k_unmap_address_range)(addr_t virtualAddress, size_t size);
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status_t (*m68k_remap_address_range)(addr_t *_virtualAddress, size_t size, bool unmap);
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#endif
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};
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#endif /* ARCH_M68K_VM_H */
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