kernel: x86: add some more cpuid flags.
Change-Id: If81c8e38c4e5a8347b5818440a7516298be585bc Reviewed-on: https://review.haiku-os.org/c/haiku/+/2242 Reviewed-by: Jérôme Duval <jerome.duval@gmail.com>
This commit is contained in:
parent
27fee67244
commit
1a836b9e04
|
@ -198,6 +198,7 @@
|
|||
#define IA32_FEATURE_AMD_EXT_NX (1 << 20) // no execute bit
|
||||
#define IA32_FEATURE_AMD_EXT_MMXEXT (1 << 22) // mmx extensions
|
||||
#define IA32_FEATURE_AMD_EXT_FFXSR (1 << 25) // fast FXSAVE/FXRSTOR
|
||||
#define IA32_FEATURE_AMD_EXT_PDPE1GB (1 << 26) // Gibibyte pages
|
||||
#define IA32_FEATURE_AMD_EXT_RDTSCP (1 << 27) // rdtscp instruction
|
||||
#define IA32_FEATURE_AMD_EXT_LONG (1 << 29) // long mode
|
||||
#define IA32_FEATURE_AMD_EXT_3DNOWEXT (1 << 30) // 3DNow! extensions
|
||||
|
@ -207,6 +208,7 @@
|
|||
// available on Intel processors
|
||||
#define IA32_FEATURES_INTEL_EXT (IA32_FEATURE_AMD_EXT_SYSCALL \
|
||||
| IA32_FEATURE_AMD_EXT_NX \
|
||||
| IA32_FEATURE_AMD_EXT_PDPE1GB \
|
||||
| IA32_FEATURE_AMD_EXT_RDTSCP \
|
||||
| IA32_FEATURE_AMD_EXT_LONG)
|
||||
|
||||
|
@ -286,13 +288,17 @@
|
|||
#define IA32_FEATURE_STIBP (1 << 27) // STIBP Speculation Control
|
||||
#define IA32_FEATURE_L1D_FLUSH (1 << 28) // L1D_FLUSH supported
|
||||
#define IA32_FEATURE_ARCH_CAPABILITIES (1 << 29) // IA32_ARCH_CAPABILITIES MSR
|
||||
#define IA32_FEATURE_SSBD (1 << 30) // Speculative Store Bypass Disable
|
||||
#define IA32_FEATURE_SSBD (1 << 31) // Speculative Store Bypass Disable
|
||||
|
||||
// x86 defined features from cpuid eax 0x80000007, edx register
|
||||
#define IA32_FEATURE_INVARIANT_TSC (1 << 8)
|
||||
|
||||
// x86 defined features from cpuid eax 0x80000008, ebx register
|
||||
#define IA32_FEATURE_AMD_EXT_IBPB (1 << 12) /* IBPB Support only (no IBRS) */
|
||||
#define IA32_FEATURE_CLZERO (1 << 0) // CLZERO instruction
|
||||
#define IA32_FEATURE_IBPB (1 << 12) // IBPB Support only (no IBRS)
|
||||
#define IA32_FEATURE_AMD_SSBD (1 << 24) // Speculative Store Bypass Disable
|
||||
#define IA32_FEATURE_VIRT_SSBD (1 << 25) // Virtualized Speculative Store Bypass Disable
|
||||
#define IA32_FEATURE_AMD_SSB_NO (1 << 26) // Speculative Store Bypass is fixed in hardware
|
||||
|
||||
|
||||
// Memory type ranges
|
||||
|
|
|
@ -462,6 +462,8 @@ dump_feature_string(int currentCPU, cpu_ent* cpu)
|
|||
strlcat(features, "mmxext ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_FFXSR)
|
||||
strlcat(features, "ffxsr ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_PDPE1GB)
|
||||
strlcat(features, "pdpe1gb ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_LONG)
|
||||
strlcat(features, "long ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_AMD] & IA32_FEATURE_AMD_EXT_3DNOWEXT)
|
||||
|
@ -552,8 +554,16 @@ dump_feature_string(int currentCPU, cpu_ent* cpu)
|
|||
strlcat(features, "msr_arch ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_7_EDX] & IA32_FEATURE_SSBD)
|
||||
strlcat(features, "ssbd ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_AMD_EXT_IBPB)
|
||||
if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_CLZERO)
|
||||
strlcat(features, "clzero ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_IBPB)
|
||||
strlcat(features, "ibpb ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_AMD_SSBD)
|
||||
strlcat(features, "amd_ssbd ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_VIRT_SSBD)
|
||||
strlcat(features, "virt_ssbd ", sizeof(features));
|
||||
if (cpu->arch.feature[FEATURE_EXT_8_EBX] & IA32_FEATURE_AMD_SSB_NO)
|
||||
strlcat(features, "amd_ssb_no ", sizeof(features));
|
||||
dprintf("CPU %d: features: %s\n", currentCPU, features);
|
||||
}
|
||||
#endif // DUMP_FEATURE_STRING
|
||||
|
|
Loading…
Reference in New Issue