Aren/haiku
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Minor code cleanup. No functional changes.

Browse Source 
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@38972 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Ithamar R. Adema 2010-10-15 10:20:21 +00:00
parent ecaa4c2990
commit 1a6a5dc39d
1 changed files with 9 additions and 118 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

127
src/system/boot/platform/u-boot/mmu.cpp
View File

@ -23,9 +23,6 @@
#include <string.h>
#include <board_config.h>
//#define TRACE_MMU
#ifdef TRACE_MMU
@ -80,72 +77,6 @@ struct memblock {
};
//Memory map of the whole memory
static struct memblock MEMORYMAP[] = {
{
"ROM", 0x00000000, 0x12345467, MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
},
{
"devices",
0x48000000,
0x48FFFFFF,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_B,
},
{
"RAM",
0x80000000,
0x9FFFFFFF,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
},
};
//memory used by the loader that should be identity mapped
#if 0/*BOARD_CPU_OMAP3*/
static struct memblock LOADER_MEMORYMAP[] = {
{
"vectors",//interrupt vectors
0x00000000,
0x00000fff,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_B,
},
{
"devices",
0x48000000,
0x48FFFFFF,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_B,
},
{
"RAM_image",//15MB for the initrd should be enough..
0x80000000,
0x80ffffff,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
},
{
"RAM_loader",//1MB loader
0x81000000,
0x810fffff,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
},
{
"RAM_pt",//Page Table 1MB
0x81100000,
0x811FFFFF,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
},
{
"RAM_free",//14MB free RAM (actually more but we don't identity map it automaticaly)
0x81200000,
0x82000000,
MMU_L2_FLAG_AP_RW | MMU_L2_FLAG_C,
},
};
#else
static struct memblock LOADER_MEMORYMAP[] = {
{
"vectors",//interrupt vectors
@ -198,25 +129,11 @@ static struct memblock LOADER_MEMORYMAP[] = {
MMU_L2_FLAG_AP_RW|MMU_L2_FLAG_C,
},
#endif
};
#endif
//static const uint32 kDefaultPageTableFlags = MMU_FLAG_READWRITE; // not cached not buffered, R/W
static const size_t kMaxKernelSize = 0x200000; // 2 MB for the kernel
static addr_t sNextPhysicalAddress = 0; //will be set by mmu_init
static addr_t sNextVirtualAddress = KERNEL_BASE + kMaxKernelSize;
static addr_t sMaxVirtualAddress = KERNEL_BASE + kMaxKernelSize;
@ -225,21 +142,12 @@ static addr_t sNextPageTableAddress = 0;
//the page directory is in front of the pagetable
static uint32 kPageTableRegionEnd = 0;
// working page directory and page table
static uint32 *sPageDirectory = 0 ;
//page directory has to be on a multiple of 16MB for
//some arm processors
static addr_t
get_next_virtual_address(size_t size)
{
@ -249,11 +157,11 @@ get_next_virtual_address(size_t size)
return address;
}
static addr_t
get_next_virtual_address_alligned (size_t size, uint32 mask)
{
TRACE(("MUH"));
TRACE(("\n\n NEXT VIRRUADRSSS: %lx\n", sNextVirtualAddress));
TRACE(("\n NEXT VIRRUADRSSS: %lx\n", sNextVirtualAddress));
addr_t address = (sNextVirtualAddress) & mask ;
TRACE(("ADDR: %lx\n", address));
@ -297,7 +205,6 @@ get_next_physical_page(size_t pagesize)
}
void
mmu_set_TTBR(uint32 ttb)
{
@ -313,6 +220,7 @@ mmu_flush_TLB()
asm volatile("MCR p15, 0, %[c8format], c8, c7, 0"::[c8format] "r" (bla) ); /* flush TLB */
}
uint32
mmu_read_C1()
{
@ -321,12 +229,14 @@ mmu_read_C1()
return bla;
}
void
mmu_write_C1(uint32 value)
{
asm volatile("MCR p15, 0, %[c1in], c1, c0, 0"::[c1in] "r" (value));
}
void
mmu_write_DACR(uint32 value)
{
@ -383,7 +293,7 @@ init_page_directory()
for (uint32 i=0; i < ARRAY_SIZE(LOADER_MEMORYMAP);i++){
pageTable = get_next_page_table(MMU_L1_TYPE_COARSEPAGETABLE);
TRACE(("BLOCK: %s START: %lx END %lx",LOADER_MEMORYMAP[i].name,LOADER_MEMORYMAP[i].start,LOADER_MEMORYMAP[i].end));
TRACE(("BLOCK: %s START: %lx END %lx\n",LOADER_MEMORYMAP[i].name,LOADER_MEMORYMAP[i].start,LOADER_MEMORYMAP[i].end));
addr_t pos = LOADER_MEMORYMAP[i].start;
int c=0;
while(pos< LOADER_MEMORYMAP[i].end){
@ -416,8 +326,6 @@ init_page_directory()
}
}
mmu_flush_TLB();
/* set up the translation table base */
@ -428,15 +336,8 @@ init_page_directory()
/* set up the domain access register */
mmu_write_DACR(0xFFFFFFFF);
dprintf("hallo1\n");
/* turn on the mmu */
mmu_write_C1(mmu_read_C1() | 0x1);
dprintf("hallo\n");
}
/*! Adds a new page table for the specified base address */
@ -464,9 +365,6 @@ add_page_table(addr_t base)
}
/*! Creates an entry to map the specified virtualAddress to the given
physicalAddress.
If the mapping goes beyond the current page table, it will allocate
@ -484,7 +382,6 @@ map_page(addr_t virtualAddress, addr_t physicalAddress, uint32 flags)
if (virtualAddress >= sMaxVirtualAddress) {
// we need to add a new page table
add_page_table(sMaxVirtualAddress);
sMaxVirtualAddress += B_PAGE_SIZE * 256;
@ -517,17 +414,12 @@ map_page(addr_t virtualAddress, addr_t physicalAddress, uint32 flags)
pageTable[tableEntry] = physicalAddress | flags;
mmu_flush_TLB();
TRACE(("map_page: done\n"));
}
// #pragma mark -
@ -547,7 +439,6 @@ mmu_map_physical_memory(addr_t physicalAddress, size_t size, uint32 flags)
}
static void
unmap_page(addr_t virtualAddress)
{
@ -568,7 +459,6 @@ unmap_page(addr_t virtualAddress)
}
extern "C" void *
mmu_allocate(void *virtualAddress, size_t size)
{
@ -589,8 +479,9 @@ mmu_allocate(void *virtualAddress, size_t size)
// is the address within the valid range?
if (address < KERNEL_BASE
|| address + size >= KERNEL_BASE + kMaxKernelSize){
TRACE(("mmu_allocate in illegal range\n address: %lx KERNELBASE: %lx KERNEL_BASE + kMaxKernelSize: %lx address + size : %lx \n ", (uint32)address , KERNEL_BASE, KERNEL_BASE
+ kMaxKernelSize,(uint32)(address + size) ));
TRACE(("mmu_allocate in illegal range\n address: %lx"
" KERNELBASE: %lx KERNEL_BASE + kMaxKernelSize: %lx address + size : %lx \n ",
(uint32)address , KERNEL_BASE, KERNEL_BASE + kMaxKernelSize,(uint32)(address + size)));
return NULL;
}
for (uint32 i = 0; i < size; i++) {