* Make sure that the bytes per scanline is always a multiple of 64. This fixes
1680x1050 with 16 bit on i865+ (still need to check the restrictions of older chips). git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@31277 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -1,5 +1,5 @@
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/*
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* Copyright 2006-2008, Haiku, Inc. All Rights Reserved.
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* Copyright 2006-2009, Haiku, Inc. All Rights Reserved.
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* Distributed under the terms of the MIT License.
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*
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* Support for i915 chipset and up based on the X driver,
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@ -281,7 +281,7 @@ compute_pll_divisors(const display_mode ¤t, pll_divisors& divisors,
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== LVDS_CLKB_POWER_UP)
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divisors.post2 = LVDS_POST2_RATE_FAST;
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else
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divisors.post2 = LVDS_POST2_RATE_SLOW;
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divisors.post2 = LVDS_POST2_RATE_SLOW;
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} else {
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if (current.timing.pixel_clock < limits.min_post2_frequency) {
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// slow DAC timing
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@ -341,7 +341,7 @@ save_lvds_mode(void)
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{
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// dump currently programmed mode.
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display_mode biosMode;
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uint32 pll = read32(INTEL_DISPLAY_B_PLL);
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uint32 pllDivisor = read32(INTEL_DISPLAY_B_PLL_DIVISOR_0);
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@ -475,6 +475,11 @@ get_color_space_format(const display_mode &mode, uint32 &colorMode,
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}
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bytesPerRow = mode.virtual_width * bytesPerPixel;
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// Make sure bytesPerRow is a multiple of 64
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// TODO: check if the older chips have the same restriction!
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if ((bytesPerRow & 63) != 0)
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bytesPerRow = (bytesPerRow + 63) & ~63;
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}
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@ -702,7 +707,7 @@ if (first) {
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read32(INTEL_DISPLAY_B_PIPE_CONTROL) | DISPLAY_PIPE_ENABLED);
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read32(INTEL_DISPLAY_B_PIPE_CONTROL);
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}
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if (gInfo->head_mode & HEAD_MODE_A_ANALOG) {
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pll_divisors divisors;
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compute_pll_divisors(target, divisors,false);
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