'cosmetic' update: in progress..
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7449 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -227,11 +227,9 @@ typedef struct {
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bool master_tmds2; /* on die TMDS encoder active on CRTC2 */
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bool tmds1_active; /* found panel on CRTC1 that is active */
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bool tmds2_active; /* found panel on CRTC2 that is active */
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uint16 panel1_width; /* native horizontal resolution for digital panels */
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uint16 panel1_height; /* navive vertical resolution for digital panels */
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display_timing p1_timing; /* 'modeline' fetched for panel 1 */
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display_timing p2_timing; /* 'modeline' fetched for panel 2 */
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float panel1_aspect; /* panel's aspect ratio */
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uint16 panel2_width; /* native horizontal resolution for digital panels */
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uint16 panel2_height; /* navive vertical resolution for digital panels */
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float panel2_aspect; /* panel's aspect ratio */
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bool crtc2_prim; /* using CRTC2 as primary CRTC */
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uint32 tvout_chip_type; /* see tvchip_type enum above */
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@ -437,7 +437,7 @@ status_t create_mode_list(void)
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/* see if there are panels connected and get their native modelines */
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bool pan1 = false, pan2 = false, pan1_added = false, pan2_added = false;
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display_mode p1, p2;
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get_panel_modelines(&p1, &p2, &pan1, &pan2);
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get_panel_modes(&p1, &p2, &pan1, &pan2);
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/* figure out how big the list could be, and adjust up to nearest multiple of B_PAGE_SIZE */
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/* note: two extra modes might be added for flatpanels */
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@ -305,8 +305,8 @@ status_t nv_crtc_set_timing(display_mode target)
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uint32 iscale_x, iscale_y;
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/* calculate inverse scaling factors used by hardware in 20.12 format */
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel1_width);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel1_height);
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.p1_timing.h_display);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.p1_timing.v_display);
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/* unblock flatpanel timing programming (or something like that..) */
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CRTCW(FP_HTIMING, 0);
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@ -316,10 +316,10 @@ status_t nv_crtc_set_timing(display_mode target)
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/* enable full width visibility on flatpanel */
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DACW(FP_HVALID_S, 0);
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DACW(FP_HVALID_E, (si->ps.panel1_width - 1));
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DACW(FP_HVALID_E, (si->ps.p1_timing.h_display - 1));
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/* enable full height visibility on flatpanel */
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DACW(FP_VVALID_S, 0);
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DACW(FP_VVALID_E, (si->ps.panel1_height - 1));
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DACW(FP_VVALID_E, (si->ps.p1_timing.v_display - 1));
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/* nVidia cards support upscaling except on ??? */
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/* NV11 cards can upscale after all! */
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@ -382,11 +382,11 @@ status_t nv_crtc_set_timing(display_mode target)
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/* enable testmode (b12) and program modified X-scaling factor */
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DACW(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12)));
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/* center/cut-off left and right side of screen */
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diff = ((si->ps.panel1_width -
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diff = ((si->ps.p1_timing.h_display -
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(target.timing.h_display * ((1 << 12) / ((float)iscale_x))))
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/ 2);
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DACW(FP_HVALID_S, diff);
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DACW(FP_HVALID_E, ((si->ps.panel1_width - diff) - 1));
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DACW(FP_HVALID_E, ((si->ps.p1_timing.h_display - diff) - 1));
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}
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/* correct for portrait panels... */
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/* NOTE:
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@ -288,8 +288,8 @@ status_t nv_crtc2_set_timing(display_mode target)
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uint32 iscale_x, iscale_y;
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/* calculate inverse scaling factors used by hardware in 20.12 format */
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.panel2_width);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.panel2_height);
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iscale_x = (((1 << 12) * target.timing.h_display) / si->ps.p2_timing.h_display);
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iscale_y = (((1 << 12) * target.timing.v_display) / si->ps.p2_timing.v_display);
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/* unblock flatpanel timing programming (or something like that..) */
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CRTC2W(FP_HTIMING, 0);
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@ -299,10 +299,10 @@ status_t nv_crtc2_set_timing(display_mode target)
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/* enable full width visibility on flatpanel */
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DAC2W(FP_HVALID_S, 0);
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DAC2W(FP_HVALID_E, (si->ps.panel2_width - 1));
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DAC2W(FP_HVALID_E, (si->ps.p2_timing.h_display - 1));
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/* enable full height visibility on flatpanel */
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DAC2W(FP_VVALID_S, 0);
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DAC2W(FP_VVALID_E, (si->ps.panel2_height - 1));
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DAC2W(FP_VVALID_E, (si->ps.p2_timing.v_display - 1));
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/* nVidia cards support upscaling except on ??? */
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/* NV11 cards can upscale after all! */
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@ -365,11 +365,11 @@ status_t nv_crtc2_set_timing(display_mode target)
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/* enable testmode (b12) and program new X-scaling factor */
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DAC2W(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12)));
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/* center/cut-off left and right side of screen */
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diff = ((si->ps.panel2_width -
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diff = ((si->ps.p2_timing.h_display -
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(target.timing.h_display * ((1 << 12) / ((float)iscale_x))))
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/ 2);
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DAC2W(FP_HVALID_S, diff);
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DAC2W(FP_HVALID_E, ((si->ps.panel2_width - diff) - 1));
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DAC2W(FP_HVALID_E, ((si->ps.p2_timing.h_display - diff) - 1));
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}
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/* correct for portrait panels... */
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/* NOTE:
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@ -151,11 +151,8 @@ status_t nv_dac_set_pix_pll(display_mode target)
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{
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LOG(4,("DAC: Fixing DFP refresh to 62Hz!\n"));
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/* readout the panel's modeline to determine the needed pixelclock */
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target.timing.pixel_clock = (
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((DACR(FP_HTOTAL) & 0x0000ffff) + 1) *
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((DACR(FP_VTOTAL) & 0x0000ffff) + 1) *
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62) / 1000;
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/* use the panel's modeline to determine the needed pixelclock */
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target.timing.pixel_clock = si->ps.p1_timing.pixel_clock;
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}
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req_pclk = (target.timing.pixel_clock)/1000.0;
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@ -157,11 +157,8 @@ status_t nv_dac2_set_pix_pll(display_mode target)
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{
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LOG(4,("DAC2: Fixing DFP refresh to 62Hz!\n"));
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/* readout the panel's modeline to determine the needed pixelclock */
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target.timing.pixel_clock = (
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((DAC2R(FP_HTOTAL) & 0x0000ffff) + 1) *
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((DAC2R(FP_VTOTAL) & 0x0000ffff) + 1) *
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62) / 1000;
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/* use the panel's modeline to determine the needed pixelclock */
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target.timing.pixel_clock = si->ps.p2_timing.pixel_clock;
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}
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req_pclk = (target.timing.pixel_clock)/1000.0;
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@ -325,11 +325,11 @@ static void detect_panels()
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LOG(2,("INFO: End flatpanel related CRTC registers dump.\n"));
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/* do some presets */
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si->ps.panel1_width = 0;
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si->ps.panel1_height = 0;
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si->ps.p1_timing.h_display = 0;
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si->ps.p1_timing.v_display = 0;
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si->ps.panel1_aspect = 0;
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si->ps.panel2_width = 0;
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si->ps.panel2_height = 0;
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si->ps.p2_timing.h_display = 0;
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si->ps.p2_timing.v_display = 0;
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si->ps.panel2_aspect = 0;
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si->ps.slaved_tmds1 = false;
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si->ps.slaved_tmds2 = false;
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@ -367,8 +367,8 @@ static void detect_panels()
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{
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si->ps.slaved_tmds1 = true;
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si->ps.tmds1_active = true;
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si->ps.panel1_width = width;
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si->ps.panel1_height = height;
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si->ps.p1_timing.h_display = width;
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si->ps.p1_timing.v_display = height;
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}
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}
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@ -380,8 +380,8 @@ static void detect_panels()
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{
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si->ps.slaved_tmds2 = true;
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si->ps.tmds2_active = true;
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si->ps.panel2_width = width;
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si->ps.panel2_height = height;
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si->ps.p2_timing.h_display = width;
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si->ps.p2_timing.v_display = height;
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}
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}
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@ -393,8 +393,8 @@ static void detect_panels()
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{
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si->ps.master_tmds1 = true;
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si->ps.tmds1_active = true;
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si->ps.panel1_width = width;
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si->ps.panel1_height = height;
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si->ps.p1_timing.h_display = width;
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si->ps.p1_timing.v_display = height;
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}
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}
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@ -406,8 +406,8 @@ static void detect_panels()
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{
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si->ps.master_tmds2 = true;
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si->ps.tmds2_active = true;
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si->ps.panel2_width = width;
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si->ps.panel2_height = height;
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si->ps.p2_timing.h_display = width;
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si->ps.p2_timing.v_display = height;
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}
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}
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@ -416,8 +416,8 @@ static void detect_panels()
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//otherwise we probably get into trouble here if the checked specs match.
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if (si->ps.laptop && si->ps.tmds1_active && si->ps.tmds2_active &&
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((DACR(FP_TG_CTRL) & 0x80000000) == (DAC2R(FP_TG_CTRL) & 0x80000000)) &&
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(si->ps.panel1_width == si->ps.panel2_width) &&
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(si->ps.panel1_height == si->ps.panel2_height))
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(si->ps.p1_timing.h_display == si->ps.p2_timing.h_display) &&
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(si->ps.p1_timing.v_display == si->ps.p2_timing.v_display))
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{
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LOG(2,("INFO: correcting double detection of single panel!\n"));
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@ -427,8 +427,8 @@ static void detect_panels()
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si->ps.slaved_tmds1 = false;
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si->ps.master_tmds1 = false;
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si->ps.tmds1_active = false;
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si->ps.panel1_width = 0;
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si->ps.panel1_height = 0;
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si->ps.p1_timing.h_display = 0;
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si->ps.p1_timing.v_display = 0;
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}
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else
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{
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@ -436,16 +436,58 @@ static void detect_panels()
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si->ps.slaved_tmds2 = false;
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si->ps.master_tmds2 = false;
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si->ps.tmds2_active = false;
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si->ps.panel2_width = 0;
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si->ps.panel2_height = 0;
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si->ps.p2_timing.h_display = 0;
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si->ps.p2_timing.v_display = 0;
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}
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}
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/* determine panel(s) aspect ratio(s) */
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/* fetch panel(s) modeline(s) */
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if (si->ps.tmds1_active)
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si->ps.panel1_aspect = (si->ps.panel1_width / ((float)si->ps.panel1_height));
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{
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/* determine panel aspect ratio */
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si->ps.panel1_aspect =
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(si->ps.p1_timing.h_display / ((float)si->ps.p1_timing.v_display));
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/* horizontal timing */
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si->ps.p1_timing.h_sync_start = (DACR(FP_HSYNC_S) & 0x0000ffff) + 1;
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si->ps.p1_timing.h_sync_end = (DACR(FP_HSYNC_E) & 0x0000ffff) + 1;
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si->ps.p1_timing.h_total = (DACR(FP_HTOTAL) & 0x0000ffff) + 1;
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/* vertical timing */
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si->ps.p1_timing.v_sync_start = (DACR(FP_VSYNC_S) & 0x0000ffff) + 1;
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si->ps.p1_timing.v_sync_end = (DACR(FP_VSYNC_E) & 0x0000ffff) + 1;
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si->ps.p1_timing.v_total = (DACR(FP_VTOTAL) & 0x0000ffff) + 1;
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/* sync polarity */
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si->ps.p1_timing.flags = 0;
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if (DACR(FP_TG_CTRL) & 0x00000001) si->ps.p1_timing.flags |= B_POSITIVE_VSYNC;
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if (DACR(FP_TG_CTRL) & 0x00000010) si->ps.p1_timing.flags |= B_POSITIVE_HSYNC;
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/* refreshrate:
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* fix a DVI or laptop flatpanel to 62Hz refresh!
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* (we can't risk getting below 60.0Hz as some panels shut-off then!) */
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si->ps.p1_timing.pixel_clock =
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(si->ps.p1_timing.h_total * si->ps.p1_timing.v_total * 62) / 1000;
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}
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if (si->ps.tmds2_active)
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si->ps.panel2_aspect = (si->ps.panel2_width / ((float)si->ps.panel2_height));
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{
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/* determine panel aspect ratio */
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si->ps.panel2_aspect =
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(si->ps.p2_timing.h_display / ((float)si->ps.p2_timing.v_display));
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/* horizontal timing */
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si->ps.p2_timing.h_sync_start = (DAC2R(FP_HSYNC_S) & 0x0000ffff) + 1;
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si->ps.p2_timing.h_sync_end = (DAC2R(FP_HSYNC_E) & 0x0000ffff) + 1;
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si->ps.p2_timing.h_total = (DAC2R(FP_HTOTAL) & 0x0000ffff) + 1;
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/* vertical timing */
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si->ps.p2_timing.v_sync_start = (DAC2R(FP_VSYNC_S) & 0x0000ffff) + 1;
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si->ps.p2_timing.v_sync_end = (DAC2R(FP_VSYNC_E) & 0x0000ffff) + 1;
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si->ps.p2_timing.v_total = (DAC2R(FP_VTOTAL) & 0x0000ffff) + 1;
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/* sync polarity */
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si->ps.p2_timing.flags = 0;
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if (DAC2R(FP_TG_CTRL) & 0x00000001) si->ps.p2_timing.flags |= B_POSITIVE_VSYNC;
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if (DAC2R(FP_TG_CTRL) & 0x00000010) si->ps.p2_timing.flags |= B_POSITIVE_HSYNC;
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/* refreshrate:
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* fix a DVI or laptop flatpanel to 62Hz refresh!
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* (we can't risk getting below 60.0Hz as some panels shut-off then!) */
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si->ps.p2_timing.pixel_clock =
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(si->ps.p2_timing.h_total * si->ps.p2_timing.v_total * 62) / 1000;
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}
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/* dump some panel configuration registers... */
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LOG(2,("INFO: Dumping flatpanel registers:\n"));
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@ -685,26 +727,12 @@ static void setup_output_matrix()
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}
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}
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void get_panel_modelines(display_mode *p1, display_mode *p2, bool *pan1, bool *pan2)
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void get_panel_modes(display_mode *p1, display_mode *p2, bool *pan1, bool *pan2)
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{
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if (si->ps.tmds1_active)
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{
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/* horizontal timing */
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p1->timing.h_display = (DACR(FP_HDISPEND) & 0x0000ffff) + 1;
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p1->timing.h_sync_start = (DACR(FP_HSYNC_S) & 0x0000ffff) + 1;
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p1->timing.h_sync_end = (DACR(FP_HSYNC_E) & 0x0000ffff) + 1;
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p1->timing.h_total = (DACR(FP_HTOTAL) & 0x0000ffff) + 1;
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/* vertical timing */
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p1->timing.v_display = (DACR(FP_VDISPEND) & 0x0000ffff) + 1;
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p1->timing.v_sync_start = (DACR(FP_VSYNC_S) & 0x0000ffff) + 1;
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p1->timing.v_sync_end = (DACR(FP_VSYNC_E) & 0x0000ffff) + 1;
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p1->timing.v_total = (DACR(FP_VTOTAL) & 0x0000ffff) + 1;
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/* sync polarity */
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p1->timing.flags = 0;
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if (DACR(FP_TG_CTRL) & 0x00000001) p1->timing.flags |= B_POSITIVE_VSYNC;
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if (DACR(FP_TG_CTRL) & 0x00000010) p1->timing.flags |= B_POSITIVE_HSYNC;
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/* refreshrate */
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p1->timing.pixel_clock = (p1->timing.h_total * p1->timing.v_total * 60) / 1000;
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/* timing ('modeline') */
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p1->timing = si->ps.p1_timing;
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/* setup the rest */
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p1->space = B_CMAP8;
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p1->virtual_width = p1->timing.h_display;
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@ -719,22 +747,8 @@ void get_panel_modelines(display_mode *p1, display_mode *p2, bool *pan1, bool *p
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if (si->ps.tmds2_active)
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{
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/* horizontal timing */
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p2->timing.h_display = (DAC2R(FP_HDISPEND) & 0x0000ffff) + 1;
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p2->timing.h_sync_start = (DAC2R(FP_HSYNC_S) & 0x0000ffff) + 1;
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p2->timing.h_sync_end = (DAC2R(FP_HSYNC_E) & 0x0000ffff) + 1;
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p2->timing.h_total = (DAC2R(FP_HTOTAL) & 0x0000ffff) + 1;
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/* vertical timing */
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p2->timing.v_display = (DAC2R(FP_VDISPEND) & 0x0000ffff) + 1;
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p2->timing.v_sync_start = (DAC2R(FP_VSYNC_S) & 0x0000ffff) + 1;
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p2->timing.v_sync_end = (DAC2R(FP_VSYNC_E) & 0x0000ffff) + 1;
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p2->timing.v_total = (DAC2R(FP_VTOTAL) & 0x0000ffff) + 1;
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/* sync polarity */
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p2->timing.flags = 0;
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if (DAC2R(FP_TG_CTRL) & 0x00000001) p2->timing.flags |= B_POSITIVE_VSYNC;
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if (DAC2R(FP_TG_CTRL) & 0x00000010) p2->timing.flags |= B_POSITIVE_HSYNC;
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/* refreshrate */
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p2->timing.pixel_clock = (p2->timing.h_total * p2->timing.v_total * 60) / 1000;
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/* timing ('modeline') */
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p2->timing = si->ps.p2_timing;
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/* setup the rest */
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p2->space = B_CMAP8;
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p2->virtual_width = p2->timing.h_display;
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@ -1213,14 +1227,14 @@ void dump_pins(void)
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LOG(2,("found DFP (digital flatpanel) on CRTC1; CRTC1 is "));
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if (si->ps.slaved_tmds1) LOG(2,("slaved\n")); else LOG(2,("master\n"));
|
||||
LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n",
|
||||
si->ps.panel1_width, si->ps.panel1_height, si->ps.panel1_aspect));
|
||||
si->ps.p1_timing.h_display, si->ps.p1_timing.v_display, si->ps.panel1_aspect));
|
||||
}
|
||||
if (si->ps.tmds2_active)
|
||||
{
|
||||
LOG(2,("found DFP (digital flatpanel) on CRTC2; CRTC2 is "));
|
||||
if (si->ps.slaved_tmds2) LOG(2,("slaved\n")); else LOG(2,("master\n"));
|
||||
LOG(2,("panel width: %d, height: %d, aspect ratio: %1.2f\n",
|
||||
si->ps.panel2_width, si->ps.panel2_height, si->ps.panel2_aspect));
|
||||
si->ps.p2_timing.h_display, si->ps.p2_timing.v_display, si->ps.panel2_aspect));
|
||||
}
|
||||
LOG(2,("monitor (output devices) setup matrix: $%02x\n", si->ps.monitors));
|
||||
LOG(2,("INFO: end pinsdump.\n"));
|
||||
|
@ -30,7 +30,7 @@ status_t i2c_maven_probe(void);
|
||||
|
||||
/*card info functions*/
|
||||
status_t parse_pins(void);
|
||||
void get_panel_modelines(display_mode *p1, display_mode *p2, bool *pan1, bool *pan2);
|
||||
void get_panel_modes(display_mode *p1, display_mode *p2, bool *pan1, bool *pan2);
|
||||
void fake_pins(void);
|
||||
void dump_pins(void);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user