added coldstart scriptcmd exec for RAM config setup (without RAM tests). The Elsa Erazor III TNT2 (NV05) script is 'fully' executed now, still nogo however. To be continued..
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8724 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
parent
74dca7b4f4
commit
09f63f9d05
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@ -18,11 +18,12 @@ static void pinsnv20_arch_fake(void);
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static void pinsnv30_arch_fake(void);
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static void getstrap_arch_nv4(void);
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static void getstrap_arch_nv10_20_30(void);
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static status_t pins2_read(uint8 *rom, uint32 offset, uint8 ram_cfg);
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static status_t pins3_6_read(uint8 *rom, uint32 offset, uint8 ram_cfg);
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static status_t pins2_read(uint8 *rom, uint32 offset);
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static status_t pins3_6_read(uint8 *rom, uint32 offset);
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static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 init_size);
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static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size);
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static void log_pll(uint32 reg);
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static void setup_ram_config(uint8* rom);
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/* Parse the BIOS PINS structure if there */
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status_t parse_pins ()
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@ -31,7 +32,6 @@ status_t parse_pins ()
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uint8 chksum = 0;
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int i;
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uint32 offset;
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uint8 ram_cfg;
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status_t result = B_ERROR;
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/* preset PINS read status to failed */
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@ -82,19 +82,17 @@ status_t parse_pins ()
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LOG(2,("INFO: PINS checksum is OK; PINS version is %d.%d\n",
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rom[offset + 5], rom[offset + 6]));
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/* fill out the si->ps struct if possible */
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ram_cfg = ((NV_REG32(NV32_NVSTRAPINFO2) >> 2) & 0x0000000f);
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/* fill out the si->ps struct as far as is possible */
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switch (rom[offset + 5])
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{
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case 2:
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result = pins2_read(rom, offset, ram_cfg);
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result = pins2_read(rom, offset);
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break;
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case 3:
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case 4:
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case 5:
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case 6:
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result = pins3_6_read(rom, offset, ram_cfg);
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result = pins3_6_read(rom, offset);
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break;
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default:
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LOG(8,("INFO: unknown PINS version\n"));
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@ -114,7 +112,7 @@ status_t parse_pins ()
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return B_OK;
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}
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static status_t pins2_read(uint8 *rom, uint32 offset, uint8 ram_cfg)
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static status_t pins2_read(uint8 *rom, uint32 offset)
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{
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uint16 init1 = rom[offset + 18] + (rom[offset + 19] * 256);
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uint16 init2 = rom[offset + 20] + (rom[offset + 21] * 256);
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@ -133,7 +131,7 @@ static status_t pins2_read(uint8 *rom, uint32 offset, uint8 ram_cfg)
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return coldstart_card(rom, init1, init2, init_size);
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}
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static status_t pins3_6_read(uint8 *rom, uint32 offset, uint8 ram_cfg)
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static status_t pins3_6_read(uint8 *rom, uint32 offset)
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{
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uint16 init1 = rom[offset + 18] + (rom[offset + 19] * 256);
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uint16 init2 = rom[offset + 20] + (rom[offset + 21] * 256);
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@ -176,6 +174,8 @@ static status_t coldstart_card(uint8* rom, uint16 init1, uint16 init2, uint16 in
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LOG(8,("INFO: executing coldstart...\n"));
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//fixme: unlock regs etc...(!)
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/* turn off both displays and the hardcursors (also disables transfers) */
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nv_crtc_dpms(false, false, false);
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nv_crtc_cursor_hide();
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@ -279,8 +279,6 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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if (exec) NV_REG32(reg) = data2;
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break;
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case 0x63:
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LOG(8,("xxx cmd, skipping...\n"));
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*size -= 1;
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if (*size < 0)
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{
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@ -290,7 +288,10 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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break;
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}
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/* execute */
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adress += 1;
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LOG(8,("cmd 'setup RAM config'\n"));
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if (exec) setup_ram_config(rom);
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break;
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case 0x65:
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*size -= 13;
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@ -539,40 +540,107 @@ static status_t exec_type1_script(uint8* rom, uint16 adress, int16* size)
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static void log_pll(uint32 reg)
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{
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if ((si->ps.card_type == NV31) || (si->ps.card_type == NV36))
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LOG(8,("\nINFO: ---WARNING: check/update PLL programming script code!!!"));
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LOG(8,("INFO: ---WARNING: check/update PLL programming script code!!!\n"));
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switch (reg)
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{
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case NV32_MEMPLL:
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LOG(8,("\nINFO: ---Memory PLL accessed.\n\n"));
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LOG(8,("INFO: ---Memory PLL accessed.\n"));
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break;
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case NV32_COREPLL:
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LOG(8,("\nINFO: ---Core PLL accessed.\n\n"));
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LOG(8,("INFO: ---Core PLL accessed.\n"));
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break;
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case NVDAC_PIXPLLC:
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LOG(8,("\nINFO: ---DAC1 PLL accessed.\n\n"));
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LOG(8,("INFO: ---DAC1 PLL accessed.\n"));
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break;
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case NVDAC2_PIXPLLC:
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LOG(8,("\nINFO: ---DAC2 PLL accessed.\n\n"));
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LOG(8,("INFO: ---DAC2 PLL accessed.\n"));
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break;
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/* unexpected cases, here for learning goals... */
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case NV32_MEMPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to memory PLL accessed only!\n\n"));
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LOG(8,("INFO: ---NV31/NV36 extension to memory PLL accessed only!\n"));
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break;
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case NV32_COREPLL2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to core PLL accessed only!\n\n"));
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LOG(8,("INFO: ---NV31/NV36 extension to core PLL accessed only!\n"));
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break;
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case NVDAC_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC1 PLL accessed only!\n\n"));
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LOG(8,("INFO: ---NV31/NV36 extension to DAC1 PLL accessed only!\n"));
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break;
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case NVDAC2_PIXPLLC2:
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LOG(8,("\nINFO: ---NV31/NV36 extension to DAC2 PLL accessed only!\n\n"));
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LOG(8,("INFO: ---NV31/NV36 extension to DAC2 PLL accessed only!\n"));
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break;
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default:
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LOG(8,("\nINFO: ---Unknown PLL accessed!\n\n"));
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LOG(8,("INFO: ---Unknown PLL accessed!\n"));
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break;
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}
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}
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static void setup_ram_config(uint8* rom)
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{
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uint32 ram_cfg, data;
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/* set MRS = 256 */
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NV_REG32(NV32_PFB_DEBUG_0) &= 0xffffffef;
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/* read RAM config hardware(?) strap */
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ram_cfg = ((NV_REG32(NV32_NVSTRAPINFO2) >> 2) & 0x0000000f);
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LOG(8,("INFO: ---RAM config strap is $%01x\n", ram_cfg));
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/* use it as a pointer in a BIOS table for prerecorded RAM configurations */
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//fixme?: is 0x01a8 indeed fixed or should this adress be gained via pins somehow?
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ram_cfg = *((uint16*)(&(rom[(0x01a8 + (ram_cfg * 2))])));
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/* log info */
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switch (ram_cfg & 0x00000003)
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{
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case 0:
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LOG(8,("INFO: ---32Mb RAM should be connected\n"));
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break;
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case 1:
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LOG(8,("INFO: ---4Mb RAM should be connected\n"));
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break;
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case 2:
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LOG(8,("INFO: ---8Mb RAM should be connected\n"));
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break;
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case 3:
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LOG(8,("INFO: ---16Mb RAM should be connected\n"));
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break;
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}
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if (ram_cfg & 0x00000004)
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LOG(8,("INFO: ---RAM should be 128bits wide\n"));
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else
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LOG(8,("INFO: ---RAM should be 64bits wide\n"));
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switch ((ram_cfg & 0x00000038) >> 3)
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{
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case 0:
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LOG(8,("INFO: ---RAM type: 8Mbit SGRAM\n"));
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break;
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case 1:
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LOG(8,("INFO: ---RAM type: 16Mbit SGRAM\n"));
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break;
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case 2:
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LOG(8,("INFO: ---RAM type: 4 banks of 16Mbit SGRAM\n"));
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break;
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case 3:
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LOG(8,("INFO: ---RAM type: 16Mbit SDRAM\n"));
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break;
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case 4:
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LOG(8,("INFO: ---RAM type: 64Mbit SDRAM\n"));
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break;
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case 5:
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LOG(8,("INFO: ---RAM type: 64Mbit x16 SDRAM\n"));
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break;
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}
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/* set RAM amount, width and type */
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data = (NV_REG32(NV32_NV4STRAPINFO) & 0xffffffc0);
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NV_REG32(NV32_NV4STRAPINFO) = (data | (ram_cfg & 0x0000003f));
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/* setup write to read delay (?) */
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data = (NV_REG32(NV32_PFB_CONFIG_1) & 0xff8ffffe);
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data |= ((ram_cfg & 0x00000700) << 12);
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/* force update via b0 = 0... */
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NV_REG32(NV32_PFB_CONFIG_1) = data;
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/* ... followed by b0 = 1(?) */
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NV_REG32(NV32_PFB_CONFIG_1) = (data | 0x00000001);
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//fixme?: do RAM width test
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//fixme?: do RAM size test
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}
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/* fake_pins presumes the card was coldstarted by it's BIOS */
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void fake_pins(void)
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{
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