m68k: build fix
Change-Id: I3e2b106d5b14a84523e74024616a5c168f011e1a Reviewed-on: https://review.haiku-os.org/c/haiku/+/2216 Reviewed-by: waddlesplash <waddlesplash@gmail.com>
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@ -39,6 +39,8 @@
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#define DLL 1
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// default latency
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#define DL 0
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// default header_type
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#define DH PCI_header_type_generic
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// default bist
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#define DB 0
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@ -53,12 +55,12 @@ struct fake_pci_device {
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};
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static struct fake_pci_device gFakePCIDevices[] = {
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{ {FAKEV, 0x0000, BN, 0, 0, 0, 0xff, PCI_host, PCI_bridge, DLL, DL, DB, 0, PEI }}, /* cpu */
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{ {FAKEV, 0x0001, BN, 1, 0, 0, 0xff, 0x68/*fake*/, PCI_processor, DLL, DL, DB, 0, PEI }}, /* cpu */
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{ {FAKEV, 0x0002, BN, 2, 0, 0, 0xff, PCI_display_other, PCI_display, DLL, DL, DB, 0, 0xFFFF8200, PEI }}, /* gfx */
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{ {FAKEV, 0x0003, BN, 3, 0, 0, 0xff, PCI_ide, PCI_mass_storage, DLL, DL, DB, 0, 0xFFF00000, PEI }}, /* ide */
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{ {FAKEV, 0x0004, BN, 4, 0, 0, 0xff, PCI_scsi, PCI_mass_storage, DLL, DL, DB, 0, PEI }}, /* scsi */
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{ {FAKEV, 0x0005, BN, 5, 0, 0, 0xff, 0x0/*CHANGEME*/, PCI_multimedia, DLL, DL, DB, 0x00, 0, 0xFFFF8900, PEI }}, /* snd */
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{ {FAKEV, 0x0000, BN, 0, 0, 0, 0xff, PCI_host, PCI_bridge, DLL, DL, DH, DB, 0, PEI }}, /* cpu */
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{ {FAKEV, 0x0001, BN, 1, 0, 0, 0xff, 0x68/*fake*/, PCI_processor, DLL, DL, DH, DB, 0, PEI }}, /* cpu */
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{ {FAKEV, 0x0002, BN, 2, 0, 0, 0xff, PCI_display_other, PCI_display, DLL, DL, DH, DB, 0, /*0xFFFF8200,*/ PEI }}, /* gfx */
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{ {FAKEV, 0x0003, BN, 3, 0, 0, 0xff, PCI_ide, PCI_mass_storage, DLL, DL, DH, DB, 0, /*0xFFF00000,*/ PEI }}, /* ide */
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{ {FAKEV, 0x0004, BN, 4, 0, 0, 0xff, PCI_scsi, PCI_mass_storage, DLL, DL, DH, DB, 0, PEI }}, /* scsi */
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{ {FAKEV, 0x0005, BN, 5, 0, 0, 0xff, 0x0/*CHANGEME*/, PCI_multimedia, DLL, DL, DH, DB, /*0x00,*/ 0, /*0xFFFF8900,*/ PEI }}, /* snd */
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//UART ?
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//centronics?
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{ {INVV, INVD} }
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@ -47,7 +47,7 @@
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#define ALIGN_BYTES (sizeof(unsigned long) - 1)
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#define ALIGN(x) ((((unsigned long)x) + ALIGN_BYTES) & ~ALIGN_BYTES)
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#if defined(__x86_64__) || defined(__i386__)
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#if defined(__x86_64__) || defined(__i386__) || defined(__M68K__)
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#define ALIGNED_POINTER(p, t) 1
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#elif defined(__powerpc__)
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#define ALIGNED_POINTER(p, t) ((((uintptr_t)(p)) & (sizeof (t) - 1)) == 0)
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@ -67,6 +67,8 @@
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#define CACHE_LINE_SIZE 64
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#elif defined(__powerpc__)
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#define CACHE_LINE_SIZE 128
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#elif defined(__M68K__)
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#define CACHE_LINE_SIZE 16
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#else
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#error Need definition of CACHE_LINE_SIZE for this arch!
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#endif
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