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* add better tracing

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* add encoder quirks


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42917 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV 2011-10-25 17:25:09 +00:00
parent 18b34d36b7
commit 07a90a634d
4 changed files with 36 additions and 4 deletions
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13
src/add-ons/accelerants/radeon_hd/display.cpp
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@ -202,7 +202,7 @@ detect_crt_ranges(uint32 crtid)
{
edid1_info *edid = &gDisplay[crtid]->edid_info;
// Scan each VESA EDID description for monitor ranges
// Scan each display EDID description for monitor ranges
for (uint32 index = 0; index < EDID1_NUM_DETAILED_MONITOR_DESC; index++) {
edid1_detailed_monitor *monitor
@ -742,10 +742,12 @@ debug_connectors()
if (gConnector[id]->valid == true) {
uint32 connectorType = gConnector[id]->type;
uint32 encoderType = gConnector[id]->encoder.type;
uint16 encoderID = gConnector[id]->encoder.objectID;
uint16 gpioID = gConnector[id]->gpioID;
ERROR("Connector #%" B_PRIu32 ")\n", id);
ERROR(" + connector: %s\n", get_connector_name(connectorType));
ERROR(" + encoder: %s\n", get_encoder_name(encoderType));
ERROR(" + encoder id: %" B_PRIu16 "\n", encoderID);
ERROR(" + gpio id: %" B_PRIu16 "\n", gpioID);
ERROR(" + gpio valid: %s\n",
gGPIOInfo[gpioID]->valid ? "true" : "false");
@ -936,18 +938,25 @@ display_crtc_fb_set(uint8 crtcID, display_mode *mode)
Write32(OUT, regs->vgaControl, 0);
uint64 fbAddressInt = gInfo->shared_info->frame_buffer_int;
TRACE("%s: Framebuffer at: 0x%" B_PRIX64 "\n", __func__, fbAddressInt);
if (info.device_chipset >= (RADEON_R700 | 0x70)) {
TRACE("%s: Set SurfaceAddress High: 0x%" B_PRIX32 "\n",
__func__, (fbAddressInt >> 32) & 0xf);
Write32(OUT, regs->grphPrimarySurfaceAddrHigh,
(fbAddressInt >> 32) & 0xf);
Write32(OUT, regs->grphSecondarySurfaceAddrHigh,
(fbAddressInt >> 32) & 0xf);
}
TRACE("%s: Set SurfaceAddress: 0x%" B_PRIX32 "\n",
__func__, (fbAddressInt & 0xFFFFFFFF));
Write32(OUT, regs->grphPrimarySurfaceAddr, (fbAddressInt & 0xFFFFFFFF));
Write32(OUT, regs->grphSecondarySurfaceAddr, (fbAddressInt & 0xFFFFFFFF));
if (info.device_chipset >= RADEON_R600) {
Write32(CRT, regs->grphControl, fbFormat);
Write32(CRT, regs->grphSwapControl, fbSwap);

19
src/add-ons/accelerants/radeon_hd/encoder.cpp
View File

@ -173,6 +173,24 @@ encoder_assign_crtc(uint8 crtcID)
}
void
encoder_apply_quirks(uint8 crtcID)
{
radeon_shared_info &info = *gInfo->shared_info;
register_info* regs = gDisplay[crtcID]->regs;
uint32 connectorIndex = gDisplay[crtcID]->connectorIndex;
uint16 encoderFlags = gConnector[connectorIndex]->encoder.flags;
// Setting the scaler clears this on some chips...
if (info.dceMajor >= 3
&& (encoderFlags & ATOM_DEVICE_TV_SUPPORT) == 0) {
// TODO: assume non interleave mode for now
// en: EVERGREEN_INTERLEAVE_EN : AVIVO_D1MODE_INTERLEAVE_EN
Write32(OUT, regs->modeDataFormat, 0);
}
}
void
encoder_mode_set(uint8 id, uint32 pixelClock)
{
@ -235,6 +253,7 @@ encoder_mode_set(uint8 id, uint32 pixelClock)
TRACE("%s: TODO for unknown encoder setup!\n", __func__);
}
encoder_apply_quirks(id);
}

1
src/add-ons/accelerants/radeon_hd/encoder.h
View File

@ -10,6 +10,7 @@
void encoder_assign_crtc(uint8 crt_id);
void encoder_apply_quirks(uint8 crtcID);
void encoder_mode_set(uint8 id, uint32 pixelClock);
status_t encoder_digital_setup(uint8 id, uint32 pixelClock, int command);
status_t encoder_analog_setup(uint8 id, uint32 pixelClock, int command);

7
src/add-ons/accelerants/radeon_hd/mode.cpp
View File

@ -82,7 +82,7 @@ radeon_get_mode_list(display_mode *modeList)
status_t
radeon_get_edid_info(void* info, size_t size, uint32* edid_version)
{
// TODO: multi-monitor? for now we use VESA and not gDisplay edid
// TODO: multi-monitor? for now we use VESA edid
TRACE("%s\n", __func__);
if (!gInfo->shared_info->has_edid)
@ -91,6 +91,10 @@ radeon_get_edid_info(void* info, size_t size, uint32* edid_version)
return B_BUFFER_OVERFLOW;
memcpy(info, &gInfo->shared_info->edid_info, sizeof(struct edid1_info));
// VESA
//memcpy(info, &gDisplay[0]->edid_info, sizeof(struct edid1_info));
// BitBanged display 0
*edid_version = EDID_VERSION_1;
return B_OK;
@ -158,7 +162,6 @@ radeon_set_display_mode(display_mode *mode)
{
radeon_shared_info &info = *gInfo->shared_info;
// TODO: multi-monitor? for now we use VESA and not gDisplay edid
// Set mode on each display
for (uint8 id = 0; id < MAX_DISPLAY; id++) {
if (gDisplay[id]->active == false)