Move PCI on a little more.
- add finding the PCI IRQ Routing table - add pci_get_capability and some simple uses to test it Thanks to Michael N for his help on getting the region working as I expected it to :) git-svn-id: file:///srv/svn/repos/haiku/trunk/current@435 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
David Reid
parent
e663def608
commit
037c83e3e6
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@ -21,9 +21,9 @@
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#include <PCI.h>
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#include <bus.h>
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#include <pci_bus.h>
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#include "pci_p.h" // private includes
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/* Change to 1 to see more debugging :) */
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#define THE_FULL_MONTY 0
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struct found_pci_device {
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struct found_pci_device *next;
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@ -49,6 +49,8 @@ static int bus_max_devices = 32; /* max devices that any bus can support
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* this is only 16, instead of the 32 we
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* have with pci_mode == 1
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*/
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static region_id pci_region; /* pci_bios region we map */
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static void * pci_bios_ptr= NULL; /* virtual address of memory we map */
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struct pci_config *pci_list;
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@ -210,6 +212,48 @@ static void write_pci_config(uchar bus, uchar device, uchar function, uchar reg,
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return;
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}
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/* pci_get_capability
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* Try to get the offset and value of the specified capability from the
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* devices capability list.
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* returns 0 if unable, 1 if succesful
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*/
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static int pci_get_capability(uint8 bus, uint8 dev, uint8 func, uint8 cap,
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uint8 *offs)
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{
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uint16 status = read_pci_config(bus, dev, func, PCI_status, 2);
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uint8 hdr_type, reg_data;
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uint8 ofs;
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if (!(status & PCI_status_capabilities))
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return 0;
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hdr_type = read_pci_config(bus, dev, func, PCI_header_type, 1);
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switch(hdr_type) {
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case PCI_header_type_generic:
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ofs = PCI_capabilities_ptr;
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break;
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case PCI_header_type_cardbus:
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ofs = PCI_capabilities_ptr_2;
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break;
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default:
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return 0;
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}
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ofs = read_pci_config(bus, dev, func, ofs, 1);
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while (ofs != 0) {
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reg_data = read_pci_config(bus, dev, func, ofs, 2);
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if ((reg_data & 0xff) == cap) {
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if (offs)
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*offs = ofs;
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return 1;
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}
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ofs = (reg_data >> 8) & 0xff;
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}
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return 0;
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}
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//static int pci_set_power_state
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/* set_pci_mechanism()
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* Try to determine which configuration mechanism the PCI Host Bridge
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* wants to deal with.
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@ -297,7 +341,109 @@ static int check_pci(void)
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"PCI will attempt to continue normally.\n");
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return -1;
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}
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/* Intel specific
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*
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* See http://www.microsoft.com/HWDEV/busbios/PCIIRQ.htm
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*
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* Intel boards have a PCI IRQ Routing table that contains details of
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* how things get routed, information we need :(
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*/
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struct linkmap {
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uint8 pin;
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uint16 possible_irq;
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} _PACKED;
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struct pir_slot {
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uint8 bus;
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uint8 devfunc;
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struct linkmap linkmap[4];
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uint8 slot;
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uint8 reserved;
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} _PACKED;
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#define PIR_HEADER "$PIR"
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struct pir_header {
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char signature[4]; /* always '$PIR' */
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uint16 version;
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uint16 tbl_sz;
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uint8 router_bus;
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uint8 router_devfunc;
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uint16 exclusive_irq;
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uint32 compat_vend;
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uint32 miniport;
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uint8 rsvd[11];
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uint8 cksum;
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} _PACKED;
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struct pir_table {
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struct pir_header hdr;
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struct pir_slot slot[1];
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} _PACKED;
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#define PIR_DEVICE(devfunc) (((devfunc) >> 3) & 0x1f)
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#define PIR_FUNCTION(devfunc) ((devfunc) & 0x07)
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/* find_pir_table
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* No real magic, just scan through the memory until we find it,
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* or not!
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*
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* When we check the size of the table, we need to satisfy that
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* size >= size of a pir_table with no pir_slots
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* size <= size of a pir_table with 32 pir_slots
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* If we find a table, and it's a suitable size we'll check that the
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* checksum is OK. This is done by simply adding up all the bytes and
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* checking that the final value == 0. If it is we return the pointer to the table.
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*
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* Returns NULL if we fail to find a suitable table.
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*/
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static struct pir_table *find_pir_table(void)
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{
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uint32 mem_addr = (uint32)pci_bios_ptr;
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int range = 0x10000;
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for (; range > 0; range -= 16, mem_addr += 16) {
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if (memcmp((void*)mem_addr, PIR_HEADER, 4) == 0) {
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uint16 size = ((struct pir_header*)mem_addr)->tbl_sz;
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if ((size >= (sizeof(struct pir_header))) &&
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(size <= (sizeof(struct pir_header) + sizeof(struct pir_slot) * 32))) {
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uint16 i;
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uint8 cksum = 0;
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for (i = 0; i < size; i++)
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cksum += ((uint8*)mem_addr)[i];
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if (cksum == 0)
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return (struct pir_table *)mem_addr;
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}
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}
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}
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return NULL;
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}
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/* print_pir_table
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* Print out the table to debug output
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*/
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#if THE_FULL_MONTY
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static void print_pir_table(struct pir_table *tbl)
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{
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int i, j;
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int entries = (tbl->hdr.tbl_sz - sizeof(struct pir_header)) / sizeof(struct pir_slot);
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for (i=0; i < entries; i++) {
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dprintf("PIR slot %d: bus %d, device %d\n",
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tbl->slot[i].slot, tbl->slot[i].bus,
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PIR_DEVICE(tbl->slot[i].devfunc));
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for (j=0; j < 4; j++)
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dprintf("\tINT%c: pin %d possible_irq's %04x\n",
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'A'+j, tbl->slot[i].linkmap[j].pin,
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tbl->slot[i].linkmap[j].possible_irq);
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}
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dprintf("*** end of table\n");
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}
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#endif
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static void scan_pci(void)
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{
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int bus, dev, func;
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@ -314,6 +460,7 @@ static void scan_pci(void)
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struct found_pci_device *npcid = NULL;
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uint16 vendor_id = read_pci_config(bus, dev, func, 0, 2);
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uint16 device_id;
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uint8 offset;
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/* If we get 0xffff then there is no device here. As there can't
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* be any gaps in function allocation this tells us that we
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* can move onto the next device/bus
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@ -350,6 +497,11 @@ static void scan_pci(void)
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return;
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}
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if (pci_get_capability(bus, dev, func, PCI_cap_id_agp, &offset))
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dprintf("Device @ %d:%d:%d has AGP capability\n", bus, dev, func);
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if (pci_get_capability(bus, dev, func, PCI_cap_id_pm, &offset))
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dprintf("Device @ %d:%d:%d has Power Management capability\n", bus, dev, func);
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/* basic header */
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pcii->bus = bus;
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pcii->device = dev;
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@ -495,159 +647,10 @@ static void pci_write_io_32(int mapped_io_addr, uint32 value)
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out32(value, mapped_io_addr);
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}
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static int pci_open(const char *name, uint32 flags, void * *_cookie)
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{
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struct pci_config *c = (struct pci_config *)kmalloc(sizeof(struct pci_config));
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/* name points at the devfs_vnode so this is safe as we have to have a shorter
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* lifetime than the vnode and the devfs_vnode
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*/
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c->full_path = (char*)name;
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dprintf("pci_open: entry on '%s'\n", c->full_path);
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*_cookie = c;
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return 0;
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}
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static int pci_freecookie(void * cookie)
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{
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kfree(cookie);
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return 0;
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}
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static int pci_close(void * cookie)
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{
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return 0;
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}
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static ssize_t pci_read(void *cookie, off_t pos, void *buf, size_t *len)
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{
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*len = 0;
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return EPERM;
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}
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static ssize_t pci_write(void * cookie, off_t pos, const void *buf, size_t *len)
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{
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return EPERM;
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}
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static int pci_ioctl(void * _cookie, uint32 op, void *buf, size_t len)
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{
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struct pci_config *cookie = _cookie;
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int err = 0;
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switch(op) {
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case PCI_GET_CFG:
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if(len < sizeof(struct pci_cfg)) {
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err= -1;
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goto err;
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}
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err = user_memcpy(buf, cookie->cfg, sizeof(struct pci_cfg));
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break;
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case PCI_DUMP_CFG:
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dump_pci_config(cookie->cfg);
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break;
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default:
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err = EINVAL;
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goto err;
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}
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err:
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return err;
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}
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device_hooks pci_hooks = {
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&pci_open,
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&pci_close,
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&pci_freecookie,
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&pci_ioctl,
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&pci_read,
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&pci_write,
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NULL, /* select */
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NULL, /* deselect */
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NULL, /* readv */
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NULL /* writev */
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};
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static int pci_create_config_structs()
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{
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int bus, unit, function;
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struct pci_cfg *cfg = NULL;
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struct pci_config *config;
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char char_buf[SYS_MAX_PATH_LEN];
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dprintf("pcifs_create_vnode_tree: entry\n");
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for(bus = 0; bus < 256; bus++) {
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char bus_txt[4];
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sprintf(bus_txt, "%d", bus);
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for(unit = 0; unit < 32; unit++) {
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char unit_txt[3];
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sprintf(unit_txt, "%d", unit);
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for(function = 0; function < 8; function++) {
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char func_txt[2];
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sprintf(func_txt, "%d", function);
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if(cfg == NULL)
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cfg = kmalloc(sizeof(struct pci_cfg));
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if(pci_probe(bus, unit, function, cfg) < 0) {
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// not possible for a unit to have a hole in functions
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// if we dont find one in this unit, there are no more
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break;
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}
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config = kmalloc(sizeof(struct pci_config));
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if(!config)
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panic("pci_create_config_structs: error allocating pci config struct\n");
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sprintf(char_buf, "bus/pci/%s/%s/%s/ctrl", bus_txt, unit_txt, func_txt);
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dprintf("created node '%s'\n", char_buf);
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config->full_path = kmalloc(strlen(char_buf)+1);
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strcpy(config->full_path, char_buf);
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config->cfg = cfg;
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config->next = NULL;
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config->next = pci_list;
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pci_list = config;
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cfg = NULL;
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}
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}
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}
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if(cfg != NULL)
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kfree(cfg);
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return 0;
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}
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int pci_bus_init(kernel_args *ka)
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{
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struct pci_config *c;
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pci_list = NULL;
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dprintf("PCI: pci_bus_init()\n");
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pci_create_config_structs();
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// create device nodes
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for(c = pci_list; c; c = c->next) {
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devfs_publish_device(c->full_path, c, &pci_hooks);
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}
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// register with the bus manager
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bus_register_bus("/dev/bus/pci");
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return 0;
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}
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static void pci_module_init(void)
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{
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struct pir_table *pirt = NULL;
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/* init the double linked list */
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pci_dev_list.next = pci_dev_list.prev = &pci_dev_list;
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@ -663,10 +666,32 @@ static void pci_module_init(void)
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* we can refine the test.
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*/
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check_pci();
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pci_region = vm_map_physical_memory(vm_get_kernel_aspace_id(),
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"pci_bios", &pci_bios_ptr,
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REGION_ADDR_ANY_ADDRESS,
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0x10000,
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LOCK_RO | LOCK_KERNEL,
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(addr)0xf0000);
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pirt = find_pir_table();
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if (pirt) {
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dprintf("PCI IRQ Routing table found\n");
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#if THE_FULL_MONTY
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print_pir_table(pirt);
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#endif
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}
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/* Get our initial list of devices */
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scan_pci();
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}
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static void pci_module_uninit(void)
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{
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vm_delete_region(vm_get_kernel_aspace_id(), pci_region);
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}
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static int std_ops(int32 op, ...)
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{
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switch(op) {
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@ -676,6 +701,7 @@ static int std_ops(int32 op, ...)
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break;
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case B_MODULE_UNINIT:
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dprintf( "PCI: uninit\n" );
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pci_module_uninit();
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break;
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default:
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return EINVAL;
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