101 lines
1.6 KiB
C
101 lines
1.6 KiB
C
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/*
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* Copyright 2021, Haiku, Inc.
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _ARCH_UART_SIFIVE_H_
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#define _ARCH_UART_SIFIVE_H_
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#include <arch/generic/debug_uart.h>
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// UARTSifiveRegs.ie, ip
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enum {
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kUartSifiveTxwm = 1 << 0,
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kUartSifiveRxwm = 1 << 1,
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};
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struct UARTSifiveRegs {
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union Txdata {
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struct {
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uint32 data: 8;
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uint32 reserved: 23;
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uint32 isFull: 1;
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};
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uint32 val;
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} txdata;
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union Rxdata {
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struct {
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uint32 data: 8;
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uint32 reserved: 23;
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uint32 isEmpty: 1;
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};
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uint32 val;
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} rxdata;
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union Txctrl {
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struct {
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uint32 enable: 1;
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uint32 nstop: 1;
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uint32 reserved1: 14;
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uint32 cnt: 3;
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uint32 reserved2: 13;
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};
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uint32 val;
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} txctrl;
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union Rxctrl {
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struct {
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uint32 enable: 1;
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uint32 reserved1: 15;
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uint32 cnt: 3;
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uint32 reserved2: 13;
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};
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uint32 val;
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} rxctrl;
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uint32 ie; // interrupt enable
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uint32 ip; // interrupt pending
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uint32 div;
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uint32 unused;
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};
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class ArchUARTSifive : public DebugUART {
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public:
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ArchUARTSifive(addr_t base, int64 clock);
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~ArchUARTSifive();
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virtual void InitEarly();
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virtual void Init();
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virtual void InitPort(uint32 baud);
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virtual void Enable();
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virtual void Disable();
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virtual int PutChar(char ch);
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virtual int GetChar(bool wait);
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virtual void FlushTx();
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virtual void FlushRx();
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protected:
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virtual void Barrier();
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inline volatile UARTSifiveRegs*
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Regs();
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};
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volatile UARTSifiveRegs*
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ArchUARTSifive::Regs()
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{
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return (volatile UARTSifiveRegs*)Base();
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}
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#endif // _ARCH_UART_SIFIVE_H_
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