55 lines
1.6 KiB
ReStructuredText
55 lines
1.6 KiB
ReStructuredText
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Notes on long double support
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============================
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The “long double” type is different on each architecture. Depending on
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the available hardware and ABI conventions, performance compromises,
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etc, there may be many implementations of it. Here is a summary for our
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convenience.
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128-bit IEEE
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------------
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Platforms: Sparc, ARM64, RISC-V
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This is the standard long double type from IEEE754. It has 1 sign bit,
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15 exponent bit, and 112 fractional part bits. It is the natural
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extension of the 64bit double.
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Sparc specifies this type in their ABI but no implementation actually
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has the instructions, they instead trigger a trap which would software
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emulate them. However, gcc short circuits this by default and calls C
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library support functions directly.
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.. _bit-ieee-1:
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64-bit IEEE
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-----------
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Platforms: ARM
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This is the same representation as plain “double”. ARM uses this for
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simplicity.
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80-bit
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------
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Platform: x86, x86_64, m68k
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This intermediate format is used by x86 CPUs internally. It may end up
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being faster than plain double there. It consists of a 64bit fractional
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part, 15 exponent bits, and 1 sign bit. This is convenient because the
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fractional part is a relatively easy to handle 64bit number.
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m68k uses a similar format, but padded to 96 bits (the extra 16 bits are
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unused).
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double double
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-------------
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Platforms: PowerPC?
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This is also a 128bit type, but the representation is just two 64bit
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doubles. The value is the sum of the two halves. This format allows
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faster emulation than a “true” 128bit long double, and the precision is
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almost as good.
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