2002-07-09 16:24:59 +04:00
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/*
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The short story: we now have MTRR support on Intel and AMD CPUs (the latter
has not yet been tested, though - I'll do this after this commit):
* Removed the arch_memory_type stuff from vm_area; since there are only 8 memory
ranges on x86, it's simply overkill. The MTRR code now remembers the area ID
and finds the MTRR that way (it could also iterate over the existing MTRRs).
* Introduced some post_modules() init functions.
* If the other x86 CPUs out there don't differ a lot, MTRR functionality might
be put back into the kernel.
* x86_write_msr() was broken, it wrote the 64 bit number with the 32 bit words
switched - it took me some time (and lots of #GPs) to figure that one out.
* Removed the macro read_ebp() and introduced a function x86_read_ebp()
(it's not really a time critical call).
* Followed the Intel docs on how to change MTRRs (symmetrically on all CPUs
with caches turned off).
* Asking for memory types will automatically change the requested length to
a power of two - note that BeOS seems to behave in the same, although that's
not really very clean.
* fixed MTRRs are ignored for now - we should make sure at least, though,
that they are identical on all CPUs (or turn them off, even though I'd
prefer the BIOS stuff to be uncacheable, which we don't enforce yet, though).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15528 a95241bf-73f2-0310-859d-f6bbb57e9c96
2005-12-13 19:34:29 +03:00
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* Copyright 2002-2005, Axel Dörfler, axeld@pinc-software.de.
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2004-11-19 23:16:20 +03:00
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* Distributed under the terms of the MIT License.
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*
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* Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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* Distributed under the terms of the NewOS License.
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*/
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2002-07-09 16:24:59 +04:00
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#ifndef _KERNEL_ARCH_CPU_H
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#define _KERNEL_ARCH_CPU_H
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2003-10-08 01:56:32 +04:00
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2004-10-21 05:41:29 +04:00
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#include <OS.h>
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2003-10-08 01:56:32 +04:00
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#include <boot/kernel_args.h>
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2002-07-09 16:24:59 +04:00
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2004-10-20 04:33:06 +04:00
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#define PAGE_ALIGN(x) (((x) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1))
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2002-07-09 16:24:59 +04:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2007-02-19 03:11:24 +03:00
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status_t arch_cpu_preboot_init_percpu(kernel_args *args, int curr_cpu);
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2004-10-21 05:41:29 +04:00
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status_t arch_cpu_init(kernel_args *args);
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2007-02-05 04:46:28 +03:00
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status_t arch_cpu_init_percpu(kernel_args *args, int curr_cpu);
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2004-10-21 05:41:29 +04:00
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status_t arch_cpu_init_post_vm(kernel_args *args);
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The short story: we now have MTRR support on Intel and AMD CPUs (the latter
has not yet been tested, though - I'll do this after this commit):
* Removed the arch_memory_type stuff from vm_area; since there are only 8 memory
ranges on x86, it's simply overkill. The MTRR code now remembers the area ID
and finds the MTRR that way (it could also iterate over the existing MTRRs).
* Introduced some post_modules() init functions.
* If the other x86 CPUs out there don't differ a lot, MTRR functionality might
be put back into the kernel.
* x86_write_msr() was broken, it wrote the 64 bit number with the 32 bit words
switched - it took me some time (and lots of #GPs) to figure that one out.
* Removed the macro read_ebp() and introduced a function x86_read_ebp()
(it's not really a time critical call).
* Followed the Intel docs on how to change MTRRs (symmetrically on all CPUs
with caches turned off).
* Asking for memory types will automatically change the requested length to
a power of two - note that BeOS seems to behave in the same, although that's
not really very clean.
* fixed MTRRs are ignored for now - we should make sure at least, though,
that they are identical on all CPUs (or turn them off, even though I'd
prefer the BIOS stuff to be uncacheable, which we don't enforce yet, though).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15528 a95241bf-73f2-0310-859d-f6bbb57e9c96
2005-12-13 19:34:29 +03:00
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status_t arch_cpu_init_post_modules(kernel_args *args);
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2004-11-19 23:16:20 +03:00
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status_t arch_cpu_shutdown(bool reboot);
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2002-07-18 18:15:47 +04:00
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2004-10-20 04:33:06 +04:00
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void arch_cpu_invalidate_TLB_range(addr_t start, addr_t end);
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void arch_cpu_invalidate_TLB_list(addr_t pages[], int num_pages);
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2005-12-14 20:07:37 +03:00
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void arch_cpu_user_TLB_invalidate(void);
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2002-07-09 16:24:59 +04:00
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void arch_cpu_global_TLB_invalidate(void);
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2005-12-14 20:07:37 +03:00
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status_t arch_cpu_user_memcpy(void *to, const void *from, size_t size,
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addr_t *faultHandler);
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ssize_t arch_cpu_user_strlcpy(char *to, const char *from, size_t size,
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addr_t *faultHandler);
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status_t arch_cpu_user_memset(void *s, char c, size_t count,
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addr_t *faultHandler);
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2002-07-09 16:24:59 +04:00
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2002-07-18 18:15:47 +04:00
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void arch_cpu_idle(void);
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2003-10-17 16:53:45 +04:00
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void arch_cpu_sync_icache(void *address, size_t length);
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2002-07-18 18:15:47 +04:00
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2008-04-26 19:18:04 +04:00
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void arch_cpu_memory_read_barrier(void);
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void arch_cpu_memory_write_barrier(void);
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2003-05-13 19:23:17 +04:00
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#ifdef __cplusplus
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}
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#endif
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2002-07-09 16:24:59 +04:00
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#include <arch_cpu.h>
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#endif /* _KERNEL_ARCH_CPU_H */
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