105 lines
3.2 KiB
C
105 lines
3.2 KiB
C
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/*
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* Copyright 2008, Dustin Howett, dustin.howett@gmail.com. All rights reserved.
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _KERNEL_ARCH_x86_HPET_H
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#define _KERNEL_ARCH_x86_HPET_H
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#include <arch/x86/arch_acpi.h>
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/* All masks are 32 bits wide to represent relative bit locations */
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/* Doing it this way is Required since the HPET only supports 32/64-bit aligned reads. */
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/* Global Capability Register Masks */
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#define HPET_CAP_MASK_ID 0x000000FF
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#define HPET_CAP_MASK_NUMTIMERS 0x00001F00
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#define HPET_CAP_MASK_WIDTH 0x00002000
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#define HPET_CAP_MASK_LEGACY 0x00008000
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#define HPET_CAP_MASK_VENDOR_ID 0xFFFF0000
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/* Retrieve Global Capabilities */
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#define HPET_GET_ID(regs) ((regs)->capability & HPET_CAP_MASK_ID)
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#define HPET_GET_NUM_TIMERS(regs) (((regs)->capability & HPET_CAP_MASK_NUMTIMERS) >> 8)
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#define HPET_IS_64BIT(regs) (((regs)->capability & HPET_CAP_MASK_WIDTH) >> 13)
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#define HPET_IS_LEGACY_CAPABLE(regs) (((regs)->capability & HPET_CAP_MASK_LEGACY) >> 15)
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#define HPET_GET_VENDOR_ID(regs) (((regs)->capability & HPET_CAP_MASK_VENDOR_ID) >> 16)
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/* Global Config Register Masks */
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#define HPET_CONF_MASK_ENABLED 0x00000001
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#define HPET_CONF_MASK_LEGACY 0x00000002
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/* Retrieve Global Configuration */
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#define HPET_IS_ENABLED(regs) ((regs)->config & HPET_CONF_MASK_ENABLED)
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#define HPET_IS_LEGACY(regs) (((regs)->config & HPET_CONF_MASK_LEGACY) >> 1)
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#define ACPI_HPET_SIGNATURE "HPET"
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struct hpet_timer {
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/* Timer Configuration/Capability bits, Reversed because x86 is LSB */
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volatile uint32 config;
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volatile uint32 interrupts; /* Each bit represents one allowed interrupt for this timer. */
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/* Read Only. If interrupt 16 is allowed, bit 16 will be 1. */
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volatile uint64 comparator; /* Comparator value */
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/* non-periodic mode: fires once when main counter = this comparator */
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/* periodic mode: fires when timer reaches this value, is increased by the original value */
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/* FSB Interrupt Route values */
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volatile uint32 fsb_value;
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volatile uint32 fsb_addr; /* Where fsb_value should be written */
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volatile uint64 reserved;
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};
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struct hpet_regs {
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/* Capability bits */
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volatile uint32 period;
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volatile uint32 capability; /* Capabilities */
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volatile uint64 reserved1;
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/* Config Bits */
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volatile uint64 config;
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volatile uint64 reserved2;
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/* Interrupt Status bits */
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volatile uint64 timer_interrupts; /* Interrupt Config bits for timers 0-31 */
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/* Level Tigger: 0 = off, 1 = set by hardware, timer is active */
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/* Edge Trigger: ignored */
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/* Writing 0 will not clear these. Must write 1 again. */
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volatile uint8 reserved3[200];
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volatile uint64 counter;
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volatile uint64 reserved4;
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volatile struct hpet_timer timer0;
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volatile struct hpet_timer timer1;
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volatile struct hpet_timer timer2;
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};
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typedef struct acpi_hpet {
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acpi_descriptor_header header; /* "HPET" signature and acpi header */
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uint16 vendor_id;
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uint8 legacy_capable : 1;
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uint8 reserved1 : 1;
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uint8 countersize : 1;
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uint8 comparators : 5;
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uint8 hw_revision;
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struct hpet_addr {
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uint8 address_space;
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uint8 register_width;
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uint8 register_offset;
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uint8 reserved;
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uint64 address;
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} hpet_address;
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uint8 number;
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uint16 min_tick;
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} _PACKED acpi_hpet;
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#endif
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