279 lines
5.6 KiB
C
279 lines
5.6 KiB
C
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/*
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Copyright (c) 2003, Thomas Kurschel
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Part of DDC driver
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Raw EDID data block.
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Raw data are packed in a really weird way. Never even
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think about using it directly, instead translate it via decode_edidpixel_clock
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first. I did my best to make the code endian-independant, but
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I cannot guarantee that I haven't missed something.
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*/
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#ifndef _EDID_RAW_H
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#define _EDID_RAW_H
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#include "bendian_bitfield.h"
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#define EDID1_NUM_DETAILED_MONITOR_DESC 4
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#define EDID1_NUM_STD_TIMING 8
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#define EDID1_NUM_EXTRA_STD_TIMING 6
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#define EDID1_EXTRA_STRING_LEN 13
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#define EDID1_NUM_EXTRA_WHITEPOINTS 2
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// header
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typedef struct _PACKED {
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int8 pad[8]; // contains 0, -1, -1, -1, -1, -1, -1, 0
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} edid1_header_raw;
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// vendor info
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typedef struct _PACKED {
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BBITFIELD8_3 ( // manufacturer
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pad : 1,
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c1 : 5, // add '@' to get ascii
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c2_high : 2
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);
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BBITFIELD8_2 (
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c2_low : 3,
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c3 : 5
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);
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uint16 prod_id;
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uint32 serial;
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uint8 week;
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uint8 year; // x+1990
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} edid1_vendor_raw;
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// version info
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typedef struct _PACKED {
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uint8 version;
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uint8 revision;
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} edid1_version_raw;
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// display info
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typedef struct _PACKED {
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BBITFIELD8_7 (
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input_type : 1, // 1 : digital
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input_voltage : 2, // 0=0.7V/0.3V, 1=0.714V/0.286,
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// 2=1V/0.4V, 3=0.7V/0V
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setup : 1, // true if voltage configurable
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sep_sync : 1,
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comp_sync : 1,
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sync_on_green : 1,
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sync_serr : 1
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);
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uint8 h_size;
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uint8 v_size;
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uint8 gamma; // (x+100)/100
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BBITFIELD8_7 (
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dpms_standby : 1,
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dpms_suspend : 1,
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dpms_off : 1,
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display_type : 2, // 0=mono, 1=rgb, 2=multicolour
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// since EDID version 1.1
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std_colour_space : 1,
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preferred_timing_mode : 1,
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gtf_supported : 1
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);
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BBITFIELD8_4 ( // low bits of red_x etc.
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red_x_low : 2,
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red_y_low : 2,
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green_x_low : 2,
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green_y_low : 2
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);
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BBITFIELD8_4 (
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blue_x_low : 2,
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blue_y_low : 2,
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white_x_low : 2,
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white_y_low : 2
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);
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uint8 red_x; // all colours are 0.10 fixed point
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uint8 red_y;
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uint8 green_x;
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uint8 green_y;
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uint8 blue_x;
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uint8 blue_y;
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uint8 white_x;
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uint8 white_y;
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} edid1_display_raw;
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// raw standard timing data
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typedef union _PACKED {
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struct _PACKED {
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uint8 h_size; // (x+31)*8
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BBITFIELD8_2 (
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ratio : 2, // 0=1:1, 1=3/4, 2=4/5, 3=9/16
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refresh : 6 // (x+60)
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);
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} timing;
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uint16 id;
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} edid1_std_timing_raw;
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// list of supported fixed timings
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typedef struct _PACKED {
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BBITFIELD8_8 (
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res_720x400x70 : 1,
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res_720x400x88 : 1,
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res_640x480x60 : 1,
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res_640x480x67 : 1,
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res_640x480x72 : 1,
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res_640x480x75 : 1,
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res_800x600x56 : 1,
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res_800x600x60 : 1
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);
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BBITFIELD8_8 (
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res_800x600x72 : 1,
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res_800x600x75 : 1,
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res_832x624x75 : 1,
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res_1024x768x87i : 1,
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res_1024x768x60 : 1,
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res_1024x768x70 : 1,
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res_1024x768x75 : 1,
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res_1280x1024x75 : 1
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);
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BBITFIELD8_2 (
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res_1152x870x75 : 1,
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pad : 7
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);
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} edid1_established_timing;
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// types of detailed monitor description
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enum {
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edid1_serial_number = 0xff,
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edid1_ascii_data = 0xfe,
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edid1_monitor_ranges = 0xfd,
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edid1_monitor_name = 0xfc,
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edid1_add_colour_pointer = 0xfb,
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edid1_add_std_timing = 0xfa,
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edid1_is_detailed_timing = 1
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};
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// monitor frequency range
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typedef struct _PACKED {
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uint8 min_v;
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uint8 max_v;
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uint8 min_h;
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uint8 max_h;
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uint8 max_clock; // in 10 MHz (!)
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} edid1_monitor_range;
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// additional whitepoint
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typedef struct _PACKED {
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uint8 index1;
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BBITFIELD8_3 (
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pad1 : 4,
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white_x1_low : 2,
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white_y1_low : 2
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);
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uint8 white_x1;
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uint8 white_y1;
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uint8 gamma1; // (x+100)/100
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uint8 index2;
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BBITFIELD8_3 (
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pad2 : 4,
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white_x2_low : 2,
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white_y2_low : 2
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);
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uint8 white_x2;
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uint8 white_y2;
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uint8 gamma2; // (x+100)/100
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} edid1_whitepoint_raw;
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// detailed timing description
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typedef struct _PACKED {
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uint16 pixel_clock; // in 10 kHz (!)
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uint8 h_active;
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uint8 h_blank;
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BBITFIELD8_2 (
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h_active_high : 4,
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h_blank_high : 4
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);
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uint8 v_active;
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uint8 v_blank;
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BBITFIELD8_2 (
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v_active_high : 4,
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v_blank_high : 4
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);
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uint8 h_sync_off;
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uint8 h_sync_width;
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BBITFIELD8_2 (
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v_sync_off : 4,
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v_sync_width : 4
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);
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BBITFIELD8_4 (
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h_sync_off_high : 2,
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h_sync_width_high : 2,
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v_sync_off_high : 2,
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v_sync_width_high : 2
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);
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uint8 h_size;
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uint8 v_size;
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BBITFIELD8_2 (
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h_size_high : 4,
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v_size_high : 4
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);
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uint8 h_border;
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uint8 v_border;
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BBITFIELD8_4 (
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interlaced : 1,
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stereo : 2, // upper bit set - left on sync
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// lower bit set - right on sync
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sync : 2,
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misc : 2
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);
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} edid1_detailed_timing_raw;
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// detailed monitor description
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typedef union _PACKED {
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edid1_detailed_timing_raw detailed_timing;
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struct _PACKED {
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uint8 zero_0[3];
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uint8 monitor_desc_type;
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uint8 zero_4;
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union _PACKED {
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uint8 serial_number[EDID1_EXTRA_STRING_LEN];
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uint8 ascii_data[EDID1_EXTRA_STRING_LEN];
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uint8 monitor_name[EDID1_EXTRA_STRING_LEN];
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edid1_monitor_range monitor_range;
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edid1_whitepoint_raw whitepoint;
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edid1_std_timing_raw std_timing[EDID1_NUM_EXTRA_STD_TIMING];
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} data;
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} extra;
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} edid1_detailed_monitor_raw;
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// raw EDID data
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// everything is packed data, mixture of little endian and big endian
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// and a bit brain dead overall - nothing your dad would be proud of
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typedef struct _PACKED {
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edid1_header_raw header; // 8 bytes
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edid1_vendor_raw vendor; // 10 bytes
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edid1_version_raw version; // 2 bytes
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edid1_display_raw display; // 15 bytes
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edid1_established_timing established_timing; // 3 bytes
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edid1_std_timing_raw std_timing[EDID1_NUM_STD_TIMING];
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// 8 a 2 bytes -> 16 bytes
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// since EDID version 1.2
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edid1_detailed_monitor_raw detailed_monitor[EDID1_NUM_DETAILED_MONITOR_DESC];
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// 4 a 18 bytes -> 72 bytes
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uint8 num_sections; // 1 byte
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uint8 check_sum; // 1 byte
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} edid1_raw; // total: 128 bytes
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#endif
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