2002-07-25 00:59:25 +04:00
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/*
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** Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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** Distributed under the terms of the NewOS License.
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*/
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#ifndef _KERNEL_ARCH_x86_DESCRIPTORS_H
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#define _KERNEL_ARCH_x86_DESCRIPTORS_H
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2003-01-06 11:02:44 +03:00
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#define KERNEL_CODE_SEG 0x8
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#define KERNEL_DATA_SEG 0x10
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2002-07-26 02:28:59 +04:00
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2003-01-06 11:02:44 +03:00
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#define USER_CODE_SEG 0x1b
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#define USER_DATA_SEG 0x23
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#ifndef _ASSEMBLER
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// this file can also be included from assembler as well
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// (and is in arch_interrupts.S)
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2005-04-05 01:43:47 +04:00
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#define DOUBLE_FAULT_TSS_BASE_SEGMENT 5
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#define TSS_BASE_SEGMENT (DOUBLE_FAULT_TSS_BASE_SEGMENT + smp_get_num_cpus())
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2003-01-06 11:02:44 +03:00
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#define TLS_BASE_SEGMENT (TSS_BASE_SEGMENT + smp_get_num_cpus())
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// defines entries in the GDT/LDT
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typedef struct segment_descriptor {
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uint16 limit_00_15; // bit 0 - 15
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uint16 base_00_15; // 16 - 31
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uint32 base_23_16 : 8; // 0 - 7
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uint32 type : 4; // 8 - 11
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uint32 desc_type : 1; // 12 (0 = system, 1 = code/data)
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uint32 privilege_level : 2; // 13 - 14
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uint32 present : 1; // 15
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uint32 limit_19_16 : 4; // 16 - 19
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uint32 available : 1; // 20
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uint32 zero : 1; // 21
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uint32 d_b : 1; // 22
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uint32 granularity : 1; // 23
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uint32 base_31_24 : 8; // 24 - 31
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} segment_descriptor;
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enum descriptor_privilege_levels {
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DPL_KERNEL = 0,
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DPL_USER = 3,
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};
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enum descriptor_types {
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// segment types
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DT_CODE_EXECUTE_ONLY = 0x8,
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DT_CODE_ACCESSED = 0x9,
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DT_CODE_READABLE = 0xa,
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DT_CODE_CONFORM = 0xc,
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DT_DATA_READ_ONLY = 0x0,
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DT_DATA_ACCESSED = 0x1,
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DT_DATA_WRITEABLE = 0x2,
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DT_DATA_EXPANSION_DOWN = 0x4,
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DT_TSS = 9,
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2004-12-14 04:46:46 +03:00
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/* non busy, 32 bit */
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2003-01-06 11:02:44 +03:00
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// descriptor types
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DT_SYSTEM_SEGMENT = 0,
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DT_CODE_DATA_SEGMENT = 1,
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};
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static inline void
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clear_segment_descriptor(struct segment_descriptor *desc)
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{
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*(long long *)desc = 0;
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}
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static inline void
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2004-10-20 04:33:06 +04:00
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set_segment_descriptor_base(struct segment_descriptor *desc, addr_t base)
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2003-01-06 11:02:44 +03:00
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{
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2004-10-20 04:33:06 +04:00
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desc->base_00_15 = (addr_t)base & 0xffff; // base is 32 bits long
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desc->base_23_16 = ((addr_t)base >> 16) & 0xff;
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desc->base_31_24 = ((addr_t)base >> 24) & 0xff;
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2003-01-06 11:02:44 +03:00
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}
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static inline void
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2004-10-20 04:33:06 +04:00
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set_segment_descriptor(struct segment_descriptor *desc, addr_t base, uint32 limit,
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2003-01-06 11:02:44 +03:00
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uint8 type, uint8 privilegeLevel)
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{
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set_segment_descriptor_base(desc, base);
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2005-04-04 18:34:18 +04:00
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// limit is 20 bits long
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if (limit & 0xfff00000) {
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desc->limit_00_15 = ((addr_t)limit >> 12) & 0x0ffff;
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desc->limit_19_16 = ((addr_t)limit >> 28) & 0xf;
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desc->granularity = 1; // 4 KB granularity
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} else {
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desc->limit_00_15 = (addr_t)limit & 0x0ffff;
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desc->limit_19_16 = ((addr_t)limit >> 16) & 0xf;
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desc->granularity = 0; // 1 byte granularity
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}
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limit >>= 12;
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2003-01-06 11:02:44 +03:00
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desc->type = type;
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desc->desc_type = DT_CODE_DATA_SEGMENT;
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desc->privilege_level = privilegeLevel;
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desc->present = 1;
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desc->available = 0; // system available bit is currently not used
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2003-01-07 12:17:31 +03:00
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desc->d_b = 1; // 32-bit code
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2003-01-06 11:02:44 +03:00
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desc->zero = 0;
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}
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static inline void
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2004-10-20 04:33:06 +04:00
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set_tss_descriptor(struct segment_descriptor *desc, addr_t base, uint32 limit)
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2003-01-06 11:02:44 +03:00
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{
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// the TSS descriptor has a special layout different from the standard descriptor
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set_segment_descriptor_base(desc, base);
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2004-10-20 04:33:06 +04:00
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desc->limit_00_15 = (addr_t)limit & 0x0ffff;
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2003-01-06 11:02:44 +03:00
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desc->limit_19_16 = 0;
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desc->type = DT_TSS;
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desc->desc_type = DT_SYSTEM_SEGMENT;
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desc->privilege_level = DPL_KERNEL;
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desc->present = 1;
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2005-04-05 01:43:47 +04:00
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desc->granularity = 0; // 1 Byte granularity
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2003-01-06 11:02:44 +03:00
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desc->available = 0; // system available bit is currently not used
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desc->d_b = 0;
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desc->zero = 0;
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}
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#endif /* _ASSEMBLER */
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#endif /* _KERNEL_ARCH_x86_DESCRIPTORS_H */
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