40 lines
903 B
C
40 lines
903 B
C
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/*
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Copyright (c) 2002, Thomas Kurschel
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Part of Radeon driver
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DMA registers
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*/
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#ifndef _DMA_REGS_H
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#define _DMA_REGS_H
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typedef struct DMA_descriptor {
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uint32 src_address;
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uint32 dest_address;
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uint32 command;
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uint32 res;
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} DMA_descriptor;
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#define RADEON_DMA_COMMAND_EOL (1 << 31)
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#define RADEON_DMA_COMMAND_INTDIS (1 << 30)
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#define RADEON_DMA_COMMAND_DAIC (1 << 29)
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#define RADEON_DMA_COMMAND_SAIC (1 << 28)
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#define RADEON_DMA_COMMAND_DAS (1 << 27)
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#define RADEON_DMA_COMMAND_SAS (1 << 26)
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#define RADEON_DMA_COMMAND_DST_SWAP_SHIFT 24
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#define RADEON_DMA_COMMAND_SRC_SWAP_SHIFT 24
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#define RADEON_DMA_COMMAND_BYTE_COUNT_SHIFT 0
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#define RADEON_DMA_DESC_MAX_SIZE 0x1fffff
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#define RADEON_DMA_GUI_TABLE_ADDR 0x0780
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#define RADEON_DMA_GUI_STATUS 0x0790
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#define RADEON_DMA_STATUS_ACTIVE (1 << 21)
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#define RADEON_DMA_VID_TABLE_ADDR 0x07a0
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#define RADEON_DMA_VID_STATUS 0x07b0
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#endif
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