235 lines
6.0 KiB
C
235 lines
6.0 KiB
C
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/*
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Copyright 2007-2009 Haiku, Inc. All rights reserved.
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Distributed under the terms of the MIT license.
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Authors:
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Gerald Zajac 2007-2009
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*/
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#ifndef DRIVERINTERFACE_H
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#define DRIVERINTERFACE_H
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#include <Accelerant.h>
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#include <GraphicsDefs.h>
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#include <Drivers.h>
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#include <edid.h>
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// This file contains info that is shared between the kernel driver and the
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// accelerant, and info that is shared among the source files of the accelerant.
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#define ENABLE_DEBUG_TRACE // if defined, turns on debug output to syslog
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#define ARRAY_SIZE(a) (int(sizeof(a) / sizeof(a[0]))) // get number of elements in an array
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struct Benaphore {
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sem_id sem;
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int32 count;
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status_t Init(const char* name)
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{
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count = 0;
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sem = create_sem(0, name);
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return sem < 0 ? sem : B_OK;
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}
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status_t Acquire()
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{
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if (atomic_add(&count, 1) > 0)
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return acquire_sem(sem);
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return B_OK;
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}
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status_t Release()
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{
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if (atomic_add(&count, -1) > 1)
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return release_sem(sem);
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return B_OK;
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}
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void Delete() { delete_sem(sem); }
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};
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enum {
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ATI_GET_SHARED_DATA = B_DEVICE_OP_CODES_END + 123,
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ATI_DEVICE_NAME,
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ATI_GET_EDID,
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ATI_RUN_INTERRUPTS,
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ATI_SET_VESA_DISPLAY_MODE
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};
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// Chip type numbers. These are used to group the chips into related
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// groups. See table chipTable in driver.c
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// Note that the order of the Mach64 chip types must not be changed because
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// < or > comparisons of the chip types are made. They should be in the order
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// of the evolution of the chips.
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enum ChipType {
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ATI_NONE = 0,
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MACH64_264VT,
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MACH64_264GT,
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MACH64_264VTB,
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MACH64_264GTB,
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MACH64_264VT3,
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MACH64_264GTDVD,
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MACH64_264LT,
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MACH64_264VT4,
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MACH64_264GT2C,
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MACH64_264GTPRO,
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MACH64_264LTPRO,
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MACH64_264XL,
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MACH64_MOBILITY,
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Mach64_ChipsEnd, // marks end of Mach64's
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RAGE128_GL,
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RAGE128_MOBILITY,
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RAGE128_PRO_GL,
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RAGE128_PRO_VR,
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RAGE128_PRO_ULTRA,
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RAGE128_VR,
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};
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#define MACH64_FAMILY(chipType) (chipType < Mach64_ChipsEnd)
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#define RAGE128_FAMILY(chipType) (chipType > Mach64_ChipsEnd)
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enum MonitorType {
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MT_VGA, // monitor with analog VGA interface
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MT_DVI, // monitor with DVI interface
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MT_LAPTOP // laptop video display
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};
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// Mach64 parameters for computing register vaules and other parameters.
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struct M64_Params {
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// Clock parameters
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uint8 clockNumberToProgram; // obtained from video BIOS
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uint32 maxPixelClock; // obtained from video BIOS
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int refFreq; // obtained from video BIOS
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int refDivider; // obtained from video BIOS
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uint8 xClkPostDivider;
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uint8 xClkRefDivider;
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uint16 xClkPageFaultDelay;
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uint16 xClkMaxRASDelay;
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uint16 displayFIFODepth;
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uint16 displayLoopLatency;
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uint8 vClkPostDivider;
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uint8 vClkFeedbackDivider;
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};
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struct R128_PLLParams {
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uint16 reference_freq;
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uint16 reference_div;
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uint32 min_pll_freq;
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uint32 max_pll_freq;
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uint16 xclk;
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};
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struct R128_RAMSpec { // All values in XCLKS
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int memReadLatency; // Memory Read Latency
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int memBurstLen; // Memory Burst Length
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int rasToCasDelay; // RAS to CAS delay
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int rasPercentage; // RAS percentage
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int writeRecovery; // Write Recovery
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int casLatency; // CAS Latency
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int readToWriteDelay; // Read to Write Delay
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int loopLatency; // Loop Latency
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int loopFudgeFactor; // Add to memReadLatency to get loopLatency
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char *name;
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};
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struct VesaMode {
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uint16 mode; // VESA mode number
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uint16 width;
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uint16 height;
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uint8 bitsPerPixel;
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};
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struct DisplayModeEx : display_mode {
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uint8 bitsPerPixel;
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uint16 bytesPerRow; // number of bytes in one line/row
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};
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struct SharedInfo {
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// Device ID info.
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uint16 vendorID; // PCI vendor ID, from pci_info
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uint16 deviceID; // PCI device ID, from pci_info
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uint8 revision; // PCI device revsion, from pci_info
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ChipType chipType; // indicates group in which chip belongs (a group has similar functionality)
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char chipName[32]; // user recognizable name of chip
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bool bAccelerantInUse; // true = accelerant has been initialized
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bool bInterruptAssigned; // card has a useable interrupt assigned to it
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sem_id vertBlankSem; // vertical blank semaphore; if < 0, there is no semaphore
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// Memory mappings.
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area_id regsArea; // area_id for the memory mapped registers. It will
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// be cloned into accelerant's address space.
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area_id videoMemArea; // video memory area_id. The addresses are shared with all teams.
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void* videoMemAddr; // video memory addr as viewed from virtual memory
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void* videoMemPCI; // video memory addr as viewed from the PCI bus (for DMA)
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uint32 videoMemSize; // video memory size in bytes.
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uint32 cursorOffset; // offset of cursor in video memory
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uint32 frameBufferOffset; // offset of frame buffer in video memory
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uint32 maxFrameBufferSize; // max available video memory for frame buffer
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// Color spaces supported by current video chip/driver.
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color_space colorSpaces[6];
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uint32 colorSpaceCount; // number of color spaces in array colorSpaces
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// List of screen modes.
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area_id modeArea; // area containing list of display modes the driver supports
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uint32 modeCount; // number of display modes in the list
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DisplayModeEx displayMode; // current display mode configuration
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// List of VESA modes supported by current chip.
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uint32 vesaModeTableOffset; // offset of table in shared info
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uint32 vesaModeCount;
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uint16 cursorHotX; // Cursor hot spot. Top left corner of the cursor
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uint16 cursorHotY; // is 0,0
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edid1_info edidInfo;
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bool bHaveEDID; // true = EDID info from device is in edidInfo
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Benaphore engineLock; // for serializing access to the acceleration engine
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MonitorType displayType;
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uint16 panelX; // laptop LCD width
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uint16 panelY; // laptop LCD height
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uint16 panelPowerDelay;
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// Data members for Mach64 chips.
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//-------------------------------
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M64_Params m64Params; // parameters for Mach64 chips
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// Data members for Rage128 chips.
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//--------------------------------
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R128_RAMSpec r128MemSpec; // Rage128 memory timing spec's
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R128_PLLParams r128PLLParams; // Rage128 PLL parameters from video BIOS ROM
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uint32 r128_dpGuiMasterCntl; // flags for accelerated drawing
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};
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#endif // DRIVERINTERFACE_H
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