91 lines
3.4 KiB
C
91 lines
3.4 KiB
C
/* $Id: lightreg.h,v 1.3 2006/12/29 00:31:48 rumble Exp $ */
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/*
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* Copyright (c) 2006 Stephen M. Rumble
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARCH_SGIMIPS_GIO_LIGHTREG_H_
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#define _ARCH_SGIMIPS_GIO_LIGHTREG_H_
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#define LIGHT_ADDR_0 0x1f3f0000
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#define LIGHT_ADDR_1 0x1f3f8000 /* dual head */
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#define REX_PAGE0_SET 0x00000000 /* REX registers */
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#define REX_PAGE0_GO 0x00000800
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#define REX_PAGE1_SET 0x00004790 /* configuration registers */
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#define REX_PAGE1_GO 0x00004F90
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/* REX register offsets (from REX_PAGE0_{SET,GO}) */
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#define REX_P0REG_COMMAND 0x00000000
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#define REX_P0REG_XSTARTI 0x0000000C
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#define REX_P0REG_YSTARTI 0x0000001C
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#define REX_P0REG_XYMOVE 0x00000034
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#define REX_P0REG_COLORREDI 0x00000038
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#define REX_P0REG_COLORGREENI 0x00000040
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#define REX_P0REG_COLORBLUEI 0x00000048
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#define REX_P0REG_COLORBACK 0x0000005C
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#define REX_P0REG_ZPATTERN 0x00000060
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#define REX_P0REG_XENDI 0x00000084
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#define REX_P0REG_YENDI 0x00000088
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/* configuration register offsets (from REX_PAGE1_{SET,GO}) */
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#define REX_P1REG_WCLOCKREV 0x00000054 /* nsclock / revision */
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#define REX_P1REG_CFGSEL 0x0000005c /* function selector */
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#define REX_P1REG_VC1_ADDRDATA 0x00000060 /* vc1 r/w addr and data 8bit */
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#define REX_P1REG_CFGMODE 0x00000068 /* REX system config */
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#define REX_P1REG_XYOFFSET 0x0000006c /* x, y start of screen */
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/* REX opcodes */
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#define REX_OP_NOP 0x00000000
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#define REX_OP_DRAW 0x00000001
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/* REX command flags */
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#define REX_OP_FLG_BLOCK 0x00000008
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#define REX_OP_FLG_LENGTH32 0x00000010
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#define REX_OP_FLG_QUADMODE 0x00000020
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#define REX_OP_FLG_XYCONTINUE 0x00000080
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#define REX_OP_FLG_STOPONX 0x00000100
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#define REX_OP_FLG_STOPONY 0x00000200
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#define REX_OP_FLG_ENZPATTERN 0x00000400
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#define REX_OP_FLG_LOGICSRC 0x00080000
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#define REX_OP_FLG_ZOPAQUE 0x00800000
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#define REX_OP_FLG_ZCONTINUE 0x01000000
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/* REX logicops */
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#define REX_LOGICOP_SRC 0x30000000
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/* configmode bits */
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#define REX_CFGMODE_BUSY 0x00000001
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/* configsel bits */
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#define REX_CFGSEL_VC1_LADDR 0x00000004 /* low address bits */
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#define REX_CFGSEL_VC1_HADDR 0x00000005 /* high address bits */
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#define REX_CFGSEL_VC1_SYSCTL 0x00000006
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/* vc1 sysctl bits (byte) */
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#define VC1_SYSCTL_VIDEO_ON 0x04
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#define VC1_SYSCTL_CURSOR 0x10
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#define VC1_SYSCTL_CURSOR_ON 0x20
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#endif /* !_ARCH_SGIMIPS_GIO_LIGHTREG_H_ */
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