2fba875a58
Add a flag argument which cause the waychdog to not be attached. Use it to disable the watchdog on loongson-based platforms, where the CS5536's reset output is not wired to the CPU reset line :(
109 lines
3.0 KiB
C
109 lines
3.0 KiB
C
/* $NetBSD: gcscpcib_pci.c,v 1.2 2011/08/29 18:34:42 bouyer Exp $ */
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/* $OpenBSD: gcscpcib.c,v 1.6 2007/11/17 17:02:47 mbalmer Exp $ */
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/*
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* Copyright (c) 2008 Yojiro UO <yuo@nui.org>
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* Copyright (c) 2007 Marc Balmer <mbalmer@openbsd.org>
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* Copyright (c) 2007 Michael Shalayeff
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* All rights reserved.
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
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* AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
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* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* AMD CS5535/CS5536 series LPC bridge also containing timer, watchdog and GPIO.
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* machine-dependent attachement.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gcscpcib_pci.c,v 1.2 2011/08/29 18:34:42 bouyer Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/gpio.h>
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#include <sys/timetc.h>
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#include <sys/wdog.h>
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#include <sys/bus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/gpio/gpiovar.h>
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#include <dev/sysmon/sysmonvar.h>
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#include <dev/ic/gcscpcibreg.h>
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#include <dev/ic/gcscpcibvar.h>
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#include <machine/cpufunc.h>
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#include <x86/pci/pcibvar.h>
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struct gcscpcib_pci_softc {
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/* we call pcibattach() which assumes softc starts like this: */
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struct pcib_softc sc_pcib;
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/* MI gcscpcib datas */
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struct gcscpcib_softc sc_gcscpcib;
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};
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static int gcscpcib_pci_match(device_t, cfdata_t, void *);
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static void gcscpcib_pci_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(gcscpcib_pci, sizeof(struct gcscpcib_pci_softc),
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gcscpcib_pci_match, gcscpcib_pci_attach, NULL, NULL);
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static int
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gcscpcib_pci_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE ||
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PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
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return 0;
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_NS_CS5535_ISA:
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case PCI_PRODUCT_AMD_CS5536_PCIB:
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return 2; /* supersede pcib(4) */
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}
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return 0;
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}
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static void
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gcscpcib_pci_attach(device_t parent, device_t self, void *aux)
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{
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struct gcscpcib_pci_softc *sc = device_private(self);
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struct pci_attach_args *pa = (struct pci_attach_args *)aux;
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sc->sc_pcib.sc_pc = pa->pa_pc;
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sc->sc_pcib.sc_tag = pa->pa_tag;
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/* Attach the PCI-ISA bridge at first */
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pcibattach(parent, self, aux);
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/* then attach gcscpcib itself */
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gcscpcib_attach(self, &sc->sc_gcscpcib, pa->pa_iot, 0);
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}
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uint64_t
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gcsc_rdmsr(uint msr)
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{
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return rdmsr(msr);
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}
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void
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gcsc_wrmsr(uint msr, uint64_t v)
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{
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wrmsr(msr, v);
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}
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