65363da25e
Tree structure: - sys/arch/sh3: sh3 generic code As commented, in-chip device drivers are put into sys/arch/sh3/dev. - sys/arch/evbsh3: sh3 evaluation boards (pure sh3 CPU, no fancy external HW) - sys/arch/mmeye: Brains mmEye, www.brains.co.jp MI source code includes couple of #ifdef for sh3-coff support. (sh3 uses coff or elf) Needs some more improvements, especialy in sys/arch/sh3/conf/files.sh3, to compile the tree (due to last minute tree structure change).
94 lines
3.4 KiB
C
94 lines
3.4 KiB
C
/* $NetBSD: pte.h,v 1.1 1999/09/13 10:31:21 itojun Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pte.h 5.5 (Berkeley) 5/9/91
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*/
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/*
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* SH3
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*
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* Page Table Entry
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*
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* T.Horiuchi Brains Corp. 05/26/1998
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*/
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#ifndef _SH3_PTE_H_
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#define _SH3_PTE_H_
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#define PDSHIFT 22 /* LOG2(NBPDR) */
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#define NBPD (1 << PDSHIFT) /* bytes/page dir */
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#define PDOFSET (NBPD-1) /* byte offset into page dir */
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#define NPTEPD (NBPD / NBPG)
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#ifndef _LOCORE
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typedef int pd_entry_t; /* page directory entry */
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typedef int pt_entry_t; /* Mach page table entry */
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#endif
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#define PD_MASK 0xffc00000 /* page directory address bits */
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#define PT_MASK 0x003ff000 /* page table address bits */
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#define PTES_PER_PTP (NBPD / NBPG) /* # of PTEs in a PTP */
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#define PG_AVAIL2 0x00000200 /* ignored by hardware */
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#define PG_V 0x00000100 /* present */
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#define PG_AVAIL1 0x00000080 /* ignored by hardware */
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#define PG_RO 0x00000000 /* read-only by user */
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#define PG_RW 0x00000020 /* read-write by user */
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#define PG_u 0x00000040 /* accessible by user */
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#define PG_PROT 0x00000060 /* all protection bits */
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#define PG_N 0x00000008 /* 0=non-cacheable */
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#define PG_M 0x00000004 /* has been modified */
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#define PG_FRAME 0xfffff000 /* page frame mask */
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#define PG_KR 0x00000000
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#define PG_KW 0x00000020
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#define PG_URKR 0x00000040
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#define PG_UW 0x00000060
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#define PG_W 0x00000400 /* page is wired */
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#define PG_4K 0x00000010
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#define PG_G 0x00000002 /* share status */
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#ifndef _LOCORE
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#ifdef _KERNEL
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/* utilities defined in pmap.c */
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extern pt_entry_t *Sysmap;
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#endif
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#endif
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#endif /* !_SH3_PTE_H_ */
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