a7f527777e
the palette generation to work with arbitrary numbers of bits. This allows X to work after a fashion, since it tries to put the VIDC into a 6:5:5 mode itself (which we ignore). Anything that actually tries to take advantage of the DirectColor visual it offers will still be screwed, but I hope such applications are rare.
748 lines
20 KiB
C
748 lines
20 KiB
C
/* $NetBSD: vidc20config.c,v 1.13 2002/06/19 22:42:02 bjh21 Exp $ */
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/*
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* Copyright (c) 2001 Reinoud Zandijk
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* Copyright (c) 1996 Mark Brinicombe
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* Copyright (c) 1996 Robert Black
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* Copyright (c) 1994-1995 Melvyn Tang-Richardson
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* Copyright (c) 1994-1995 RiscBSD kernel team
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the RiscBSD kernel team
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE RISCBSD TEAM ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* NetBSD kernel project
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*
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* vidcvideo.c
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*
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* This file is the lower basis of the wscons driver for VIDC based ARM machines.
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* It features the initialisation and all VIDC writing and keeps in internal state
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* copy.
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* Its currenly set up as a library file and not as a device; it could be named
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* vidcvideo0 eventually.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: vidc20config.c,v 1.13 2002/06/19 22:42:02 bjh21 Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <arm/iomd/vidc.h>
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#include <arm/arm32/katelib.h>
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#include <machine/bootconfig.h>
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#include <machine/intr.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <uvm/uvm_extern.h>
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#include <arm/iomd/iomdreg.h>
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#include <arm/iomd/iomdvar.h>
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#include <arm/iomd/vidc20config.h>
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/*
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* A structure containing ALL the information required to restore
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* the VIDC20 to any given state. ALL vidc transactions should
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* go through these procedures, which record the vidc's state.
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* it may be an idea to set the permissions of the vidc base address
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* so we get a fault, so the fault routine can record the state but
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* I guess that's not really necessary for the time being, since we
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* can make the kernel more secure later on. Also, it is possible
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* to write a routine to allow 'reading' of the vidc registers.
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*/
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static struct vidc_state vidc_lookup = {
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{ 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0
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},
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VIDC_PALREG,
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VIDC_BCOL,
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VIDC_CP1 ,
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VIDC_CP2,
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VIDC_CP3,
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VIDC_HCR,
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VIDC_HSWR,
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VIDC_HBSR,
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VIDC_HDSR,
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VIDC_HDER,
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VIDC_HBER,
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VIDC_HCSR,
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VIDC_HIR,
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VIDC_VCR,
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VIDC_VSWR,
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VIDC_VBSR,
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VIDC_VDSR,
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VIDC_VDER,
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VIDC_VBER,
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VIDC_VCSR,
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VIDC_VCER,
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VIDC_EREG,
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VIDC_FSYNREG,
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VIDC_CONREG,
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VIDC_DCTL
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};
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struct vidc_state vidc_current[1];
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/*
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* XXX global display variables XXX ... should be a structure
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*/
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static int cold_init = 0; /* flags initialisation */
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extern videomemory_t videomemory;
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static struct vidc_mode vidc_initialmode;
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static struct vidc_mode *vidc_currentmode;
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unsigned int dispstart;
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unsigned int dispsize;
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unsigned int dispbase;
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unsigned int dispend;
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unsigned int ptov;
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unsigned int vmem_base;
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unsigned int phys_base;
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unsigned int transfersize;
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/* cursor stuff */
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char *cursor_normal;
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char *cursor_transparent;
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int p_cursor_normal;
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int p_cursor_transparent;
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int cursor_width;
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int cursor_height;
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/*
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* VIDC mode definitions
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* generated from RISC OS mode definition file by an `awk' script
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*/
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extern struct vidc_mode vidcmodes[];
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/*
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* configuration printing
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*
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*/
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void
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vidcvideo_printdetails(void)
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{
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printf(": refclk=%dMHz %dKB %s ", (vidc_fref / 1000000),
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videomemory.vidm_size / 1024,
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(videomemory.vidm_type == VIDEOMEM_TYPE_VRAM) ? "VRAM" : "DRAM");
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}
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/*
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* Common functions to directly access VIDC registers
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*/
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int
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vidcvideo_write(reg, value)
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u_int reg;
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int value;
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{
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int counter;
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int *current;
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int *tab;
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tab = (int *)&vidc_lookup;
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current = (int *)vidc_current;
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/*
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* OK, the VIDC_PALETTE register is handled differently
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* to the others on the VIDC, so take that into account here
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*/
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if (reg==VIDC_PALREG) {
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vidc_current->palreg = 0;
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WriteWord(vidc_base, reg | value);
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return 0;
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}
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if (reg==VIDC_PALETTE) {
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WriteWord(vidc_base, reg | value);
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vidc_current->palette[vidc_current->palreg] = value;
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vidc_current->palreg++;
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vidc_current->palreg = vidc_current->palreg & 0xff;
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return 0;
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}
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/*
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* Undefine SAFER if you wish to speed things up (a little)
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* although this means the function will assume things abou
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* the structure of vidc_state. i.e. the first 256 words are
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* the palette array
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*/
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#define SAFER
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#ifdef SAFER
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#define INITVALUE 0
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#else
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#define INITVALUE 256
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#endif
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for ( counter=INITVALUE; counter<= sizeof(struct vidc_state); counter++ ) {
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if ( reg==tab[counter] ) {
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WriteWord ( vidc_base, reg | value );
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current[counter] = value;
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return 0;
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}
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}
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return -1;
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}
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void
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vidcvideo_setpalette(vidc)
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struct vidc_state *vidc;
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{
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int counter = 0;
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vidcvideo_write(VIDC_PALREG, 0x00000000);
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for (counter = 0; counter < 255; counter++)
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vidcvideo_write(VIDC_PALETTE, vidc->palette[counter]);
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}
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void
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vidcvideo_setstate(vidc)
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struct vidc_state *vidc;
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{
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vidcvideo_write ( VIDC_PALREG, vidc->palreg );
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vidcvideo_write ( VIDC_BCOL, vidc->bcol );
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vidcvideo_write ( VIDC_CP1, vidc->cp1 );
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vidcvideo_write ( VIDC_CP2, vidc->cp2 );
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vidcvideo_write ( VIDC_CP3, vidc->cp3 );
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vidcvideo_write ( VIDC_HCR, vidc->hcr );
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vidcvideo_write ( VIDC_HSWR, vidc->hswr );
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vidcvideo_write ( VIDC_HBSR, vidc->hbsr );
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vidcvideo_write ( VIDC_HDSR, vidc->hdsr );
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vidcvideo_write ( VIDC_HDER, vidc->hder );
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vidcvideo_write ( VIDC_HBER, vidc->hber );
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vidcvideo_write ( VIDC_HCSR, vidc->hcsr );
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vidcvideo_write ( VIDC_HIR, vidc->hir );
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vidcvideo_write ( VIDC_VCR, vidc->vcr );
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vidcvideo_write ( VIDC_VSWR, vidc->vswr );
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vidcvideo_write ( VIDC_VBSR, vidc->vbsr );
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vidcvideo_write ( VIDC_VDSR, vidc->vdsr );
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vidcvideo_write ( VIDC_VDER, vidc->vder );
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vidcvideo_write ( VIDC_VBER, vidc->vber );
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vidcvideo_write ( VIDC_VCSR, vidc->vcsr );
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vidcvideo_write ( VIDC_VCER, vidc->vcer );
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/*
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* Right, dunno what to set these to yet, but let's keep RiscOS's
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* ones for now, until the time is right to finish this code
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*/
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/* vidcvideo_write ( VIDC_EREG, vidc->ereg ); */
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/* vidcvideo_write ( VIDC_FSYNREG, vidc->fsynreg ); */
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/* vidcvideo_write ( VIDC_CONREG, vidc->conreg ); */
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/* vidcvideo_write ( VIDC_DCTL, vidc->dctl ); */
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}
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void
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vidcvideo_getstate(vidc)
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struct vidc_state *vidc;
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{
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*vidc = *vidc_current;
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}
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void
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vidcvideo_getmode(mode)
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struct vidc_mode *mode;
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{
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*mode = *vidc_currentmode;
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}
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static int
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vidcvideo_coldinit(void)
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{
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int found;
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int loop;
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/* Blank out the cursor */
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vidcvideo_write(VIDC_CP1, 0x0);
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vidcvideo_write(VIDC_CP2, 0x0);
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vidcvideo_write(VIDC_CP3, 0x0);
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/* Try to determine the current mode */
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vidc_initialmode.hder = bootconfig.width+1;
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vidc_initialmode.vder = bootconfig.height+1;
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vidc_initialmode.log2_bpp = bootconfig.log2_bpp;
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dispbase = vmem_base = dispstart = videomemory.vidm_vbase;
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phys_base = videomemory.vidm_pbase;
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/* Nut - should be using videomemory.vidm_size - mark */
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if (videomemory.vidm_type == VIDEOMEM_TYPE_DRAM) {
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dispsize = videomemory.vidm_size;
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transfersize = 16;
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} else {
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dispsize = bootconfig.vram[0].pages * NBPG;
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transfersize = dispsize >> 10;
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};
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ptov = dispbase - phys_base;
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dispend = dispstart+dispsize;
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/* try to find the current mode from the bootloader in my table */
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vidc_currentmode = &vidcmodes[0];
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loop = 0;
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found = 0;
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while (vidcmodes[loop].pixel_rate != 0) {
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if (vidcmodes[loop].hder == (bootconfig.width + 1)
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&& vidcmodes[loop].vder == (bootconfig.height + 1)
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&& vidcmodes[loop].frame_rate == bootconfig.framerate) {
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vidc_currentmode = &vidcmodes[loop];
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found = 1;
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}
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++loop;
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}
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/* if not found choose first mode but dont be picky on the framerate */
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if (!found) {
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vidc_currentmode = &vidcmodes[0];
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loop = 0;
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found = 0;
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while (vidcmodes[loop].pixel_rate != 0) {
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if (vidcmodes[loop].hder == (bootconfig.width + 1)
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&& vidcmodes[loop].vder == (bootconfig.height + 1)) {
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vidc_currentmode = &vidcmodes[loop];
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found = 1;
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}
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++loop;
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}
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}
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vidc_currentmode->log2_bpp = bootconfig.log2_bpp;
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dispstart = dispbase;
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dispend = dispstart+dispsize;
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IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov);
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IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov);
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IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov);
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return 0;
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}
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/* simple function to abstract vidc variables ; returns virt start address of screen */
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/* XXX asumption that video memory is mapped in twice */
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void *vidcvideo_hwscroll(int bytes) {
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dispstart += bytes;
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if (dispstart >= dispbase + dispsize) dispstart -= dispsize;
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if (dispstart < dispbase) dispstart += dispsize;
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dispend = dispstart+dispsize;
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/* return the start of the bit map of the screen (left top) */
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return (void *) dispstart;
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}
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/* reset the HW scroll to be at the start for the benefit of f.e. X */
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void *vidcvideo_hwscroll_reset(void) {
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void *cookie = (void *) dispstart;
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dispstart = dispbase;
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dispend = dispstart + dispsize;
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return cookie;
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}
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/* put HW scroll back to where it was */
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void *vidcvideo_hwscroll_back(void *cookie) {
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dispstart = (int) cookie;
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dispend = dispstart + dispsize;
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return cookie;
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}
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|
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/* this function is to be called perferably at vsync */
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void vidcvideo_progr_scroll(void) {
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IOMD_WRITE_WORD(IOMD_VIDINIT, dispstart-ptov);
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IOMD_WRITE_WORD(IOMD_VIDSTART, dispstart-ptov);
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IOMD_WRITE_WORD(IOMD_VIDEND, (dispend-transfersize)-ptov);
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}
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/*
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* Select a new mode by reprogramming the VIDC chip
|
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* XXX this part is known not to work for 32bpp
|
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*/
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|
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struct vidc_mode newmode;
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|
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static const int bpp_mask_table[] = {
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0, /* 1bpp */
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1, /* 2bpp */
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2, /* 4bpp */
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3, /* 8bpp */
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4, /* 16bpp */
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6 /* 32bpp */
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};
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|
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|
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void
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vidcvideo_setmode(struct vidc_mode *mode)
|
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{
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register int acc;
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int bpp_mask;
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int ereg;
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int best_r, best_v;
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int least_error;
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int r, v, f;
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|
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/*
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* Find out what bit mask we need to or with the vidc20 control register
|
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* in order to generate the desired number of bits per pixel.
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* log_bpp is log base 2 of the number of bits per pixel.
|
|
*/
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|
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bpp_mask = bpp_mask_table[mode->log2_bpp];
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newmode = *mode;
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vidc_currentmode = &newmode;
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|
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least_error = INT_MAX;
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best_r = 0; best_v = 0;
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|
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for (v = 63; v > 0; v--) {
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for (r = 63; r > 0; r--) {
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f = ((v * vidc_fref) /1000) / r;
|
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if (least_error >=
|
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abs(f - vidc_currentmode->pixel_rate)) {
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least_error =
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abs(f - vidc_currentmode->pixel_rate);
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best_r = r;
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best_v = v;
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}
|
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}
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}
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|
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if (best_r > 63) best_r=63;
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if (best_v > 63) best_v=63;
|
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if (best_r < 1) best_r= 1;
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if (best_v < 1) best_v= 1;
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|
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vidcvideo_write(VIDC_FSYNREG, (best_v-1)<<8 | (best_r-1)<<0);
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acc=0;
|
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acc+=vidc_currentmode->hswr; vidcvideo_write(VIDC_HSWR, (acc - 8 ) & (~1));
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acc+=vidc_currentmode->hbsr; vidcvideo_write(VIDC_HBSR, (acc - 12) & (~1));
|
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acc+=vidc_currentmode->hdsr; vidcvideo_write(VIDC_HDSR, (acc - 18) & (~1));
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|
acc+=vidc_currentmode->hder; vidcvideo_write(VIDC_HDER, (acc - 18) & (~1));
|
|
acc+=vidc_currentmode->hber; vidcvideo_write(VIDC_HBER, (acc - 12) & (~1));
|
|
acc+=vidc_currentmode->hcr; vidcvideo_write(VIDC_HCR, (acc - 8 ) & (~3));
|
|
|
|
acc=0;
|
|
acc+=vidc_currentmode->vswr; vidcvideo_write(VIDC_VSWR, (acc - 1));
|
|
acc+=vidc_currentmode->vbsr; vidcvideo_write(VIDC_VBSR, (acc - 1));
|
|
acc+=vidc_currentmode->vdsr; vidcvideo_write(VIDC_VDSR, (acc - 1));
|
|
acc+=vidc_currentmode->vder; vidcvideo_write(VIDC_VDER, (acc - 1));
|
|
acc+=vidc_currentmode->vber; vidcvideo_write(VIDC_VBER, (acc - 1));
|
|
acc+=vidc_currentmode->vcr; vidcvideo_write(VIDC_VCR, (acc - 1));
|
|
|
|
IOMD_WRITE_WORD(IOMD_FSIZE, vidc_currentmode->vcr
|
|
+ vidc_currentmode->vswr
|
|
+ vidc_currentmode->vber
|
|
+ vidc_currentmode->vbsr - 1);
|
|
|
|
if (dispsize <= 1024*1024)
|
|
vidcvideo_write(VIDC_DCTL, vidc_currentmode->hder>>2 | 1<<16 | 1<<12);
|
|
else
|
|
vidcvideo_write(VIDC_DCTL, vidc_currentmode->hder>>2 | 3<<16 | 1<<12);
|
|
|
|
ereg = 1<<12;
|
|
if (vidc_currentmode->sync_pol & 0x01)
|
|
ereg |= 1<<16;
|
|
if (vidc_currentmode->sync_pol & 0x02)
|
|
ereg |= 1<<18;
|
|
vidcvideo_write(VIDC_EREG, ereg);
|
|
if (dispsize > 1024*1024) {
|
|
if (vidc_currentmode->hder >= 800)
|
|
vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5);
|
|
else
|
|
vidcvideo_write(VIDC_CONREG, 6<<8 | bpp_mask<<5);
|
|
} else {
|
|
vidcvideo_write(VIDC_CONREG, 7<<8 | bpp_mask<<5);
|
|
}
|
|
}
|
|
|
|
|
|
#if 0
|
|
/* not used for now */
|
|
void
|
|
vidcvideo_set_display_base(base)
|
|
u_int base;
|
|
{
|
|
dispstart = dispstart-dispbase + base;
|
|
dispbase = vmem_base = base;
|
|
dispend = base + dispsize;
|
|
ptov = dispbase - phys_base;
|
|
}
|
|
#endif
|
|
|
|
|
|
/*
|
|
* Main initialisation routine for now
|
|
*/
|
|
|
|
static int cursor_init = 0;
|
|
|
|
int
|
|
vidcvideo_init(void)
|
|
{
|
|
vidcvideo_coldinit();
|
|
if (cold_init && (cursor_init == 0))
|
|
/* vidcvideo_flash_go() */;
|
|
|
|
/* setting a mode goes wrong in 32 bpp ... 8 and 16 seem OK */
|
|
vidcvideo_setmode(vidc_currentmode);
|
|
vidcvideo_blank(0); /* display on */
|
|
|
|
vidcvideo_stdpalette();
|
|
|
|
if (cold_init == 0) {
|
|
vidcvideo_write(VIDC_CP1, 0x0);
|
|
vidcvideo_write(VIDC_CP2, 0x0);
|
|
vidcvideo_write(VIDC_CP3, 0x0);
|
|
} else {
|
|
vidcvideo_cursor_init(CURSOR_MAX_WIDTH, CURSOR_MAX_HEIGHT);
|
|
};
|
|
|
|
cold_init=1;
|
|
return 0;
|
|
}
|
|
|
|
|
|
/* reinitialise the vidcvideo */
|
|
void
|
|
vidcvideo_reinit()
|
|
{
|
|
vidcvideo_coldinit();
|
|
vidcvideo_setmode(vidc_currentmode);
|
|
}
|
|
|
|
|
|
int
|
|
vidcvideo_cursor_init(int width, int height)
|
|
{
|
|
static char *cursor_data = NULL;
|
|
int counter;
|
|
int line;
|
|
paddr_t pa;
|
|
|
|
cursor_width = width;
|
|
cursor_height = height;
|
|
|
|
if (!cursor_data) {
|
|
/* Allocate cursor memory first time round */
|
|
cursor_data = (char *)uvm_km_zalloc(kernel_map, NBPG);
|
|
if (!cursor_data)
|
|
panic("Cannot allocate memory for hardware cursor\n");
|
|
(void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_data, &pa);
|
|
IOMD_WRITE_WORD(IOMD_CURSINIT, pa);
|
|
}
|
|
|
|
/* Blank the cursor while initialising it's sprite */
|
|
|
|
vidcvideo_write ( VIDC_CP1, 0x0 );
|
|
vidcvideo_write ( VIDC_CP2, 0x0 );
|
|
vidcvideo_write ( VIDC_CP3, 0x0 );
|
|
|
|
cursor_normal = cursor_data;
|
|
cursor_transparent = cursor_data + (height * width);
|
|
|
|
cursor_transparent += 32; /* ALIGN */
|
|
cursor_transparent = (char *)((int)cursor_transparent & (~31) );
|
|
|
|
for ( line = 0; line<height; ++ line )
|
|
{
|
|
for ( counter=0; counter<width/4;counter++ )
|
|
cursor_normal[line * width + counter]=0x55; /* why 0x55 ? */
|
|
for ( ; counter<8; counter++ )
|
|
cursor_normal[line * width + counter]=0;
|
|
}
|
|
|
|
for ( line = 0; line<height; ++ line )
|
|
{
|
|
for ( counter=0; counter<width/4;counter++ )
|
|
cursor_transparent[line * width + counter]=0x00;
|
|
for ( ; counter<8; counter++ )
|
|
cursor_transparent[line * width + counter]=0;
|
|
}
|
|
|
|
|
|
(void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_normal,
|
|
(paddr_t *)&p_cursor_normal);
|
|
(void) pmap_extract(pmap_kernel(), (vaddr_t)cursor_transparent,
|
|
(paddr_t *)&p_cursor_transparent);
|
|
|
|
memset ( cursor_normal, 0x55, width*height ); /* white? */
|
|
memset ( cursor_transparent, 0x00, width*height ); /* to see the diffence */
|
|
|
|
/* Ok, now program the cursor; should be blank */
|
|
vidcvideo_enablecursor(0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
void
|
|
vidcvideo_updatecursor(xcur, ycur)
|
|
int xcur, ycur;
|
|
{
|
|
int frontporch = vidc_currentmode->hswr + vidc_currentmode->hbsr + vidc_currentmode->hdsr;
|
|
int topporch = vidc_currentmode->vswr + vidc_currentmode->vbsr + vidc_currentmode->vdsr;
|
|
|
|
vidcvideo_write(VIDC_HCSR, frontporch -17 + xcur);
|
|
vidcvideo_write(VIDC_VCSR, topporch -2 + (ycur+1)-2 + 3 - cursor_height);
|
|
vidcvideo_write(VIDC_VCER, topporch -2 + (ycur+3)+2 + 3 );
|
|
return;
|
|
}
|
|
|
|
|
|
void
|
|
vidcvideo_enablecursor(on)
|
|
int on;
|
|
{
|
|
if (on) {
|
|
IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_normal);
|
|
} else {
|
|
IOMD_WRITE_WORD(IOMD_CURSINIT,p_cursor_transparent);
|
|
};
|
|
vidcvideo_write ( VIDC_CP1, 0xffffff ); /* enable */
|
|
|
|
return;
|
|
}
|
|
|
|
|
|
void
|
|
vidcvideo_stdpalette()
|
|
{
|
|
int i;
|
|
|
|
switch (vidc_currentmode->log2_bpp) {
|
|
case 0: /* 1 bpp */
|
|
case 1: /* 2 bpp */
|
|
case 2: /* 4 bpp */
|
|
case 3: /* 8 bpp */
|
|
vidcvideo_write(VIDC_PALREG, 0x00000000);
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 0));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 0));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 0));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 0));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 0, 255));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 0, 255));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL( 0, 255, 255));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 128));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 128));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 255, 128));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 128));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(128, 128, 255));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 128, 255));
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(255, 255, 255));
|
|
break;
|
|
case 4: /* 16 bpp */
|
|
/*
|
|
* The use of the palette in 16-bit modes is quite
|
|
* fun. Comments in linux/drivers/video/acornfb.c
|
|
* imply that it goes something like this:
|
|
*
|
|
* red = LUT[pixel[7:0]].red
|
|
* green = LUT[pixel[11:4]].green
|
|
* blue = LUT[pixel[15:8]].blue
|
|
*
|
|
* We use 6:5:5 R:G:B cos that's what Xarm32VIDC wants.
|
|
*/
|
|
#define RBITS 6
|
|
#define GBITS 5
|
|
#define BBITS 5
|
|
vidcvideo_write(VIDC_PALREG, 0x00000000);
|
|
for (i = 0; i < 256; i++) {
|
|
int r, g, b;
|
|
|
|
r = i & ((1 << RBITS) - 1);
|
|
g = (i >> (RBITS - 4)) & ((1 << GBITS) - 1);
|
|
b = (i >> (RBITS + GBITS - 8)) & ((1 << BBITS) - 1);
|
|
vidcvideo_write(VIDC_PALETTE,
|
|
VIDC_COL(r << (8 - RBITS) | r >> (2 * RBITS - 8),
|
|
g << (8 - GBITS) | g >> (2 * GBITS - 8),
|
|
b << (8 - BBITS) | b >> (2 * BBITS - 8)));
|
|
}
|
|
break;
|
|
case 5: /* 32 bpp */
|
|
vidcvideo_write(VIDC_PALREG, 0x00000000);
|
|
for (i = 0; i < 256; i++)
|
|
vidcvideo_write(VIDC_PALETTE, VIDC_COL(i, i, i));
|
|
break;
|
|
}
|
|
|
|
}
|
|
|
|
int
|
|
vidcvideo_blank(video_off)
|
|
int video_off;
|
|
{
|
|
int ereg;
|
|
|
|
ereg = 1<<12;
|
|
if (vidc_currentmode->sync_pol & 0x01)
|
|
ereg |= 1<<16;
|
|
if (vidc_currentmode->sync_pol & 0x02)
|
|
ereg |= 1<<18;
|
|
|
|
if (!video_off) {
|
|
vidcvideo_write(VIDC_EREG, ereg);
|
|
} else {
|
|
vidcvideo_write(VIDC_EREG, 0);
|
|
};
|
|
return 0;
|
|
}
|
|
|
|
/* end of vidc20config.c */
|