fb9c150c48
- Most changes are comment cleanups. _ iomd.h is no longer an exported header. - Added intr.h for MI interrupt definitions. - Added definitions for ARM8 cpu. - Added bus dma support.
126 lines
3.9 KiB
C
126 lines
3.9 KiB
C
/* $NetBSD: signal.h,v 1.5 1997/10/14 09:20:33 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* signal.h
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*
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* Architecture dependant signal types and structures
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*
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* Created : 30/09/94
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*/
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#ifndef _ARM32_SIGNAL_H_
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#define _ARM32_SIGNAL_H_
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#ifndef _LOCORE
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typedef int sig_atomic_t;
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/*
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* Information pushed on stack when a signal is delivered.
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* This is used by the kernel to restore state following
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* execution of the signal handler. It is also made available
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* to the handler to allow it to restore state properly if
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* a non-standard exit is performed.
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*/
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struct sigcontext {
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int sc_onstack; /* sigstack state to restore */
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int sc_mask; /* signal mask to restore */
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unsigned int sc_spsr;
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unsigned int sc_r0;
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unsigned int sc_r1;
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unsigned int sc_r2;
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unsigned int sc_r3;
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unsigned int sc_r4;
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unsigned int sc_r5;
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unsigned int sc_r6;
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unsigned int sc_r7;
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unsigned int sc_r8;
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unsigned int sc_r9;
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unsigned int sc_r10;
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unsigned int sc_r11;
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unsigned int sc_r12;
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unsigned int sc_usr_sp;
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unsigned int sc_usr_lr;
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unsigned int sc_svc_lr;
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unsigned int sc_pc;
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};
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#endif
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/* Signals codes */
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/*
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* SIGFPE codes
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*
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* see ieeefp.h for definition of FP exception codes
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*/
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#define SIG_CODE_FPE_CODE_MASK 0x00000f00 /* Mask for exception code */
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#define SIG_CODE_FPE_CODE_SHIFT 8 /* Shift for exception code */
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#define SIG_CODE_FPE_TYPE_MASK 0x000000ff /* Mask for specific code */
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/*
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* SIGILL codes
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*
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* the signal code is the instruction that raised the signal
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*/
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/*
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* SIGBUS and SIGSEGV codes
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*
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* The signal code is combination of the fault address and the fault code.
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*
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* The fault code is the coproc #15 fault status code
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*
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* The exception to this is a SIGBUS or SIGSEGV from a prefetch abort.
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* In this case the fault status code is not valid so the TYPE_MASK
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* should be treated as undefined (in practice it is the bottom 4 bits
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* of the fault address).
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*/
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#define SIG_CODE_BUS_ADDR_MASK 0xfffffff0
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#define SIG_CODE_BUS_TYPE_MASK 0x0000000f
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#define SIG_CODE_SEGV_ADDR_MASK SIG_CODE_BUS_ADDR_MASK
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#define SIG_CODE_SEGV_TYPE_MASK SIG_CODE_BUS_TYPE_MASK
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#endif /* _ARM_SIGNAL_H_ */
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/* End of signal.h */
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