227 lines
6.5 KiB
C
227 lines
6.5 KiB
C
/* $NetBSD: sacc_obio.c,v 1.13 2012/11/12 18:00:39 skrll Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by IWAMOTO Toshihiro.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* for SA-1111 companion chip on Intel DBPXA250 evaluation board.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.13 2012/11/12 18:00:39 skrll Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/syslog.h>
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#include <sys/select.h>
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#include <sys/device.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#include <machine/intr.h>
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#include <sys/bus.h>
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#include <arm/sa11x0/sa1111_reg.h>
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#include <arm/sa11x0/sa1111_var.h>
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#include <arm/xscale/pxa2x0cpu.h>
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#include <arm/xscale/pxa2x0reg.h>
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#include <arm/xscale/pxa2x0var.h>
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#include <arm/xscale/pxa2x0_gpio.h>
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#include <evbarm/lubbock/lubbock_reg.h>
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#include <evbarm/lubbock/lubbock_var.h>
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static int sacc_obio_probe(device_t parent, cfdata_t match, void *aux);
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static void sacc_obio_attach(device_t, device_t, void *);
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static int sacc_obio_intr(void *arg);
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CFATTACH_DECL_NEW(sacc_obio, sizeof(struct sacc_softc), sacc_obio_probe,
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sacc_obio_attach, NULL, NULL);
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#if 0
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#define DPRINTF(arg) aprint_normal arg
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#else
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#define DPRINTF(arg)
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#endif
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uint16_t cs2_memctl_init = 0x7ff0;
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static int
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sacc_obio_probe(device_t parent, cfdata_t match, void *aux)
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{
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struct obio_attach_args *oa = aux;
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struct sa11x0_attach_args sa;
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printf("%s: addr=%lx\n", __func__, oa->oba_addr);
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sa.sa_sc = oa->oba_sc;
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sa.sa_iot = oa->oba_iot;
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sa.sa_addr = oa->oba_addr;
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sa.sa_size = 0x2000;
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return sacc_probe(parent, match, &sa);
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}
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static void
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sacc_obio_attach(device_t parent, device_t self, void *aux)
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{
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int i;
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uint32_t skid, tmp;
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struct sacc_softc *sc = device_private(self);
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struct obio_softc *psc = device_private(parent);
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struct obio_attach_args *sa = aux;
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bus_space_tag_t iot = sa->oba_iot;
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bus_space_handle_t memctl_ioh;
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aprint_normal("\n");
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/* Set alternative function for GPIO pings 48..57 on PXA2X0 */
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for (i=48; i <= 55; ++i)
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pxa2x0_gpio_set_function(i, GPIO_ALT_FN_2_OUT);
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pxa2x0_gpio_set_function(56, GPIO_ALT_FN_1_IN);
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pxa2x0_gpio_set_function(57, GPIO_ALT_FN_1_IN);
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/* XXX */
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if (bus_space_map(iot, PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 0,
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&memctl_ioh))
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goto fail;
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tmp = bus_space_read_4(iot, memctl_ioh, MEMCTL_MSC2 );
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bus_space_write_4(iot, memctl_ioh, MEMCTL_MSC2,
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(tmp & 0xffff0000) | cs2_memctl_init );
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bus_space_unmap(iot, memctl_ioh, PXA2X0_MEMCTL_SIZE);
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sc->sc_dev = self;
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sc->sc_piot = sc->sc_iot = iot;
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sc->sc_gpioh = 0; /* not used */
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if (bus_space_map(iot, sa->oba_addr, 0x2000/*size*/, 0, &sc->sc_ioh))
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goto fail;
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skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID);
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aprint_normal_dev(self, "SA1111 rev %d.%d\n",
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(skid & 0xf0) >> 4, skid & 0xf);
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tmp = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR);
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tmp = (tmp & ~SKCR_VCOOFF) | SKCR_PLLBYPASS;
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bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp );
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delay(100); /* XXX */
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tmp |= SKCR_RCLKEN;
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bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR, tmp );
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#if 1
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if( tmp != bus_space_read_4( sc->sc_iot, sc->sc_ioh, SACCSBI_SKCR ) )
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printf( "!!! FAIL SKCR\n" );
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#endif
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/* PCMCIA socket0 power control */
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bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DVR, 0 );
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bus_space_write_4( sc->sc_iot, sc->sc_ioh, SACCGPIOA_DDR, 0 );
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for(i = 0; i < SACCIC_LEN; i++)
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sc->sc_intrhand[i] = NULL;
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/* initialize SA1111 interrupt controller */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR0, 0xffffffff);
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR1, 0xffffffff);
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/* connect to On-board peripheral interrupt */
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obio_intr_establish(psc, sa->oba_intr,
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IPL_HIGH, sacc_obio_intr, sc );
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/*
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* Attach each devices
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*/
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config_search_ia(sa1111_search, self, "sacc", NULL);
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return;
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fail:
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aprint_normal_dev(self, "unable to map registers\n");
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}
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static int
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sacc_obio_intr(void *arg)
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{
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int i;
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struct sacc_intrvec intstat;
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struct sacc_softc *sc = arg;
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struct sacc_intrhand *ih;
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intstat.lo =
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0);
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intstat.hi =
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bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
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DPRINTF(("sacc_obio_intr_dispatch: %x %x\n", intstat.lo, intstat.hi));
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while ((i = find_first_bit(intstat.lo)) >= 0) {
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/*
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* Clear intr status before calling intr handlers.
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* This cause stray interrupts, but clearing
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* after calling intr handlers cause intr lossage.
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*/
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR0, 1U<<i );
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for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
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softint_schedule(ih->ih_soft);
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intstat.lo &= ~(1U<<i);
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}
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while ((i = find_first_bit(intstat.hi)) >= 0) {
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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SACCIC_INTSTATCLR1, 1U<<i);
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for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
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softint_schedule(ih->ih_soft);
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intstat.hi &= ~(1U<<i);
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}
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return 1;
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}
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