285 lines
6.9 KiB
C
285 lines
6.9 KiB
C
/* $NetBSD: ixp425_timer.c,v 1.18 2012/11/12 18:00:38 skrll Exp $ */
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/*
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* Copyright (c) 2003
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* Ichiro FUKUHARA <ichiro@ichiro.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ixp425_timer.c,v 1.18 2012/11/12 18:00:38 skrll Exp $");
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#include "opt_ixp425.h"
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#include "opt_perfctrs.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/atomic.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/device.h>
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#include <dev/clock_subr.h>
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#include <sys/bus.h>
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#include <machine/intr.h>
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#include <arm/cpufunc.h>
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#include <arm/xscale/ixp425reg.h>
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#include <arm/xscale/ixp425var.h>
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#include <arm/xscale/ixp425_sipvar.h>
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static int ixpclk_match(device_t, cfdata_t, void *);
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static void ixpclk_attach(device_t, device_t, void *);
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static u_int ixpclk_get_timecount(struct timecounter *);
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static uint32_t counts_per_hz;
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static void *clock_ih;
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/* callback functions for intr_functions */
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int ixpclk_intr(void *);
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struct ixpclk_softc {
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bus_addr_t sc_baseaddr;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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};
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#ifndef IXP425_CLOCK_FREQ
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#define COUNTS_PER_SEC 66666600 /* 66MHz */
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#else
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#define COUNTS_PER_SEC IXP425_CLOCK_FREQ
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#endif
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#define COUNTS_PER_USEC ((COUNTS_PER_SEC / 1000000) + 1)
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static struct ixpclk_softc *ixpclk_sc;
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static struct timecounter ixpclk_timecounter = {
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ixpclk_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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0xffffffff, /* counter_mask */
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COUNTS_PER_SEC, /* frequency */
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"ixpclk", /* name */
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100, /* quality */
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NULL, /* prev */
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NULL, /* next */
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};
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static volatile uint32_t ixpclk_base;
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CFATTACH_DECL_NEW(ixpclk, sizeof(struct ixpclk_softc),
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ixpclk_match, ixpclk_attach, NULL, NULL);
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#define GET_TIMER_VALUE(sc) (bus_space_read_4((sc)->sc_iot, \
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(sc)->sc_ioh, \
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IXP425_OST_TIM0))
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#define GET_TS_VALUE(sc) (*(volatile uint32_t *) \
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(IXP425_TIMER_VBASE + IXP425_OST_TS))
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static int
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ixpclk_match(device_t parent, cfdata_t match, void *aux)
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{
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return 2;
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}
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static void
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ixpclk_attach(device_t parent, device_t self, void *aux)
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{
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struct ixpclk_softc *sc = device_private(self);
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struct ixpsip_attach_args *sa = aux;
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printf("\n");
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ixpclk_sc = sc;
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sc->sc_iot = sa->sa_iot;
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sc->sc_baseaddr = sa->sa_addr;
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if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0,
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&sc->sc_ioh))
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panic("%s: Cannot map registers", device_xname(self));
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aprint_normal_dev(self, "IXP425 Interval Timer\n");
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}
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/*
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* cpu_initclocks:
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*
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* Initialize the clock and get them going.
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*/
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void
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cpu_initclocks(void)
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{
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struct ixpclk_softc *sc = ixpclk_sc;
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u_int oldirqstate;
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#if defined(PERFCTRS)
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void *pmu_ih;
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#endif
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if (hz < 50 || COUNTS_PER_SEC % hz) {
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aprint_error("Cannot get %d Hz clock; using 100 Hz\n", hz);
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hz = 100;
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}
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/*
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* We only have one timer available; stathz and profhz are
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* always left as 0 (the upper-layer clock code deals with
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* this situation).
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*/
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if (stathz != 0)
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aprint_error("Cannot get %d Hz statclock\n", stathz);
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stathz = 0;
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if (profhz != 0)
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aprint_error("Cannot get %d Hz profclock\n", profhz);
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profhz = 0;
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/* Report the clock frequency. */
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aprint_normal("clock: hz=%d stathz=%d profhz=%d\n", hz, stathz, profhz);
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oldirqstate = disable_interrupts(I32_bit);
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/* Hook up the clock interrupt handler. */
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clock_ih = ixp425_intr_establish(IXP425_INT_TMR0, IPL_CLOCK,
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ixpclk_intr, NULL);
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if (clock_ih == NULL)
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panic("cpu_initclocks: unable to register timer interrupt");
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#if defined(PERFCTRS)
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pmu_ih = ixp425_intr_establish(IXP425_INT_XPMU, IPL_STATCLOCK,
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xscale_pmc_dispatch, NULL);
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if (pmu_ih == NULL)
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panic("cpu_initclocks: unable to register timer interrupt");
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#endif
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/* Set up the new clock parameters. */
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/* clear interrupt */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_STATUS,
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OST_WARM_RESET | OST_WDOG_INT | OST_TS_INT |
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OST_TIM1_INT | OST_TIM0_INT);
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counts_per_hz = COUNTS_PER_SEC / hz;
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/* reload value & Timer enable */
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_TIM0_RELOAD,
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(counts_per_hz & TIMERRELOAD_MASK) | OST_TIMER_EN);
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restore_interrupts(oldirqstate);
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tc_init(&ixpclk_timecounter);
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}
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/*
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* setstatclockrate:
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*
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* Set the rate of the statistics clock.
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*
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* We assume that hz is either stathz or profhz, and that neither
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* will change after being set by cpu_initclocks(). We could
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* recalculate the intervals here, but that would be a pain.
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*/
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void
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setstatclockrate(int newhz)
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{
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/*
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* XXX Use TMR1?
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*/
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}
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static u_int
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ixpclk_get_timecount(struct timecounter *tc)
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{
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u_int savedints, base, counter;
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savedints = disable_interrupts(I32_bit);
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base = ixpclk_base;
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counter = GET_TIMER_VALUE(ixpclk_sc);
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restore_interrupts(savedints);
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return base - counter;
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}
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/*
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* delay:
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*
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* Delay for at least N microseconds.
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*/
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void
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delay(u_int n)
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{
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uint32_t first, last;
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int usecs;
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if (n == 0)
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return;
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/*
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* Clamp the timeout at a maximum value (about 32 seconds with
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* a 66MHz clock). *Nobody* should be delay()ing for anywhere
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* near that length of time and if they are, they should be hung
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* out to dry.
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*/
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if (n >= (0x80000000U / COUNTS_PER_USEC))
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usecs = (0x80000000U / COUNTS_PER_USEC) - 1;
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else
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usecs = n * COUNTS_PER_USEC;
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/* Note: Timestamp timer counts *up*, unlike the other timers */
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first = GET_TS_VALUE();
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while (usecs > 0) {
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last = GET_TS_VALUE();
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usecs -= (int)(last - first);
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first = last;
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}
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}
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/*
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* ixpclk_intr:
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*
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* Handle the hardclock interrupt.
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*/
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int
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ixpclk_intr(void *arg)
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{
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struct ixpclk_softc *sc = ixpclk_sc;
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struct clockframe *frame = arg;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_STATUS,
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OST_TIM0_INT);
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atomic_add_32(&ixpclk_base, counts_per_hz);
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hardclock(frame);
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return (1);
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}
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