409 lines
12 KiB
Groff
409 lines
12 KiB
Groff
.\" $NetBSD: wdc.9,v 1.9 2002/02/13 08:18:57 ross Exp $
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.\"
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.\" Copyright (c) 1998 Manuel Bouyer.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. All advertising materials mentioning features or use of this software
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.\" must display the following acknowledgement:
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.\" This product includes software developed by the University of
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.\" California, Berkeley and its contributors.
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.\" 4. Neither the name of the University nor the names of its contributors
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.\" may be used to endorse or promote products derived from this software
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.\" without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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.\" INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.\"
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.Dd October 18, 1998
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.Dt WDC 9
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.Os
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.Sh NAME
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.Nm wdc
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.Nd machine-independent IDE/ATAPI driver
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.Sh SYNOPSIS
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.Fd #include \*[Lt]dev/ata/atavar.h\*[Gt]
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.Fd #include \*[Lt]sys/dev/ic/wdcvar.h\*[Gt]
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.Ft int
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.Fn wdcprobe "struct channel_softc * chp"
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.Ft void
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.Fn wdcattach "struct channel_softc * chp"
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.Sh DESCRIPTION
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The
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.Nm
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driver provides the machine independent core functions for driving IDE
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devices.
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IDE devices-specific drivers (
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.Nm wd
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or
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.Nm atapibus )
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will use services provided by
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.Nm wdc .
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.Pp
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The machine-dependent bus front-end provides informations to
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.Nm
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with the
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.Va wdc_softc
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and
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.Va channel_softc
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structures.
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The first one defines global controller properties, and the second contains
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per-channel informations.
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.Nm
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returns informations about the attached devices in the
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.Va ata_drive_datas
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structure.
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.Bd -literal
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struct wdc_softc { /* Per controller state */
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struct device sc_dev;
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int cap;
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#define WDC_CAPABILITY_DATA16 0x0001
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#define WDC_CAPABILITY_DATA32 0x0002
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#define WDC_CAPABILITY_MODE 0x0004
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#define WDC_CAPABILITY_DMA 0x0008
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#define WDC_CAPABILITY_UDMA 0x0010
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#define WDC_CAPABILITY_HWLOCK 0x0020
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#define WDC_CAPABILITY_ATA_NOSTREAM 0x0040
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#define WDC_CAPABILITY_ATAPI_NOSTREAM 0x0080
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#define WDC_CAPABILITY_NO_EXTRA_RESETS 0x0100
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u_int8_t pio_mode;
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u_int8_t dma_mode;
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int nchannels;
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struct channel_softc *channels;
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void *dma_arg;
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int (*dma_init)(void *, int, int, void *, size_t, int);
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void (*dma_start)(void *, int, int, int);
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int (*dma_finish)(void *, int, int, int);
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#define WDC_DMA_READ 0x01
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#define WDC_DMA_POLL 0x02
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int (*claim_hw)(void *, int);
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void (*free_hw)(void *);
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};
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struct channel_softc { /* Per channel data */
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int channel;
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struct wdc_softc *wdc;
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bus_space_tag_t cmd_iot;
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bus_space_handle_t cmd_ioh;
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bus_space_tag_t ctl_iot;
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bus_space_handle_t ctl_ioh;
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bus_space_tag_t data32iot;
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bus_space_handle_t data32ioh;
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int ch_flags;
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#define WDCF_ACTIVE 0x01
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#define WDCF_IRQ_WAIT 0x10
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u_int8_t ch_status;
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u_int8_t ch_error;
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struct ata_drive_datas ch_drive[2];
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struct channel_queue *ch_queue;
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};
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struct ata_drive_datas {
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u_int8_t drive;
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u_int8_t drive_flags;
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#define DRIVE_ATA 0x01
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#define DRIVE_ATAPI 0x02
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#define DRIVE (DRIVE_ATA|DRIVE_ATAPI)
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#define DRIVE_CAP32 0x04
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#define DRIVE_DMA 0x08
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#define DRIVE_UDMA 0x10
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#define DRIVE_MODE 0x20
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u_int8_t PIO_mode;
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u_int8_t DMA_mode;
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u_int8_t UDMA_mode;
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u_int8_t state;
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struct device *drv_softc;
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void* chnl_softc;
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};
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.Ed
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.Pp
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The bus front-end needs to fill in the following elements of
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.Va wdc_softc :
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.Bl -tag -compact -width "dma_finish" -offset "xxxx"
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.It cap
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supports one or more of the WDC_CAPABILITY flags
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.It nchannels
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number of channels supported by this controller
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.It channels
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array of
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.Va struct channel_softc
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of size
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.Va nchannels
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properly initialised
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.El
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The following elements are optional:
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.Bl -tag -compact -width "dma_finish" -offset "xxxx"
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.It pio_mode
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.It dma_mode
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.It dma_arg
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.It dma_init
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.It dma_start
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.It dma_finish
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.It claim_hw
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.It free_hw
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.El
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.Pp
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The
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.Va WDC_CAPABILITY_DATA16
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and
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.Va WDC_CAPABILITY_DATA32
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flags informs
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.Nm
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whether the controller supports 16- or 32-bit I/O accesses on the data port.
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If both are set, a test will be done for each drive using the ATA or
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ATAPI IDENTIFY command, to automatically select the working mode.
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.Pp
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The
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.Va WDC_CAPABILITY_DMA
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and
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.Va WDC_CAPABILITY_UDMA
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flags are set for controllers supporting the DMA and Ultra-DMA modes.
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The bus front-end needs to provide the
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.Fn dma_init ,
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.Fn dma_start
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and
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.Fn dma_finish
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functions.
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.Fn dma_init
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is called just before issuing a DMA command to the IDE device.
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The arguments are, respectively:
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.Va dma_arg ,
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the channel number, the drive number on this channel,
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the virtual address of the DMA buffer, the size of the transfer, and the
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.Va WDC_DMA
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flags.
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.Fn dma_start
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is called just after issuing a DMA command to the IDE device.
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The arguments are, respectively:
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.Va dma_arg ,
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the channel number, the drive number on this channel, and the
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.Va WDC_DMA
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flags.
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.Fn dma_finish
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is called once the transfer is complete.
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The arguments are, respectively:
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.Va dma_arg ,
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the channel number, the drive number on this channel, and the
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.Va WDC_DMA
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flags.
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.Va WDC_DMA_READ
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indicates the direction of the data transfer, and
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.Va WDC_DMA_POLL
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indicates if the transfer will use (or used) interrupts.
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.Pp
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The
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.Va WDC_CAPABILITY_MODE
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flag means that the bus front-end can program the PIO and DMA modes, so
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.Nm
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needs to provide back the supported modes for each drive, and set the drives
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modes.
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The
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.Va pio_mode
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and
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.Va dma_mode
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needs to be set to the highest PIO and DMA mode supported.
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If
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.Va WDC_CAPABILITY_UDMA
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is set, then
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.Va dma_mode
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must be set to the highest Ultra-DMA mode supported.
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If
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.Va WDC_CAPABILITY_MODE
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is not set,
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.Nm
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will not attempt to change the current drive's settings, assuming the host's
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firmware has done it right.
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.Pp
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The
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.Va WDC_CAPABILITY_HWLOCK
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flag is set for controllers needing hardware looking before accessing the
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I/O ports.
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If this flag is set, the bus front-end needs to provide the
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.Fn claim_hw
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and
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.Fn free_hw
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functions.
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.Fn claim_hw
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will be called when the driver wants to access the controller ports.
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The second parameter is set to 1 when it is possible to sleep waiting
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for the lock, 0 otherwise.
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It should return 1 when access has been granted, 0 otherwise.
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When access has not been granted and sleep is not allowed, the bus
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front-end shall call
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.Fn wdcrestart
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with the first argument passed to
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.Fn claim_hw
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as argument.
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This arguments will also be the one passed to
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.Fn free_hw .
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This function is called once the transfer is complete, so that the lock can
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be released.
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.Pp
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Accesses to the data port are done by using the bus_space stream functions,
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unless the
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.Va WDC_CAPABILITY_ATA_NOSTREAM
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or
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.Va WDC_CAPABILITY_ATAPI_NOSTREAM
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flags are set.
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This should not be used, unless the data bus is not wired properly (which
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seems common on big-endian systems), and byte-order needs to be preserved
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for compatibility with the host's firmware.
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Also note that the IDE bus is a little-endian bus, so the bus_space
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functions used for the bus_space tag passed in the
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.Va channel_softc
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have to do the appropriate byte-swapping for big-endian systems.
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.Pp
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.Va WDC_CAPABILITY_NO_EXTRA_RESETS
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avoid the controller reset at the end of the disks probe.
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This reset is needed for some controllers, but causes problems with some
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others.
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.Pp
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The bus front-end needs to fill in the following
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elements of
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.Va channel_softc :
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.Bl -tag -compact -width "dma_finish" -offset "xxxx"
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.It channel
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The channel number on the controller
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.It wdc
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A pointer to the controller's wdc_softc
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.It cmd_iot, cmd_ioh
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Bus-space tag and handle for access to the command block registers (which
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includes the 16-bit data port)
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.It ctl_iot, ctl_ioh
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Bus-space tag and handle for access to the control block registers
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.It ch_queue
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A pointer to a
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.Va struct channel_queue .
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This will hold the queues of outstanding commands for this controller.
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.El
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The following elements are optional:
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.Bl -tag -compact -width "dma_finish" -offset "xxxx"
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.It data32iot, data32ioh
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Bus-space tag and handle for 32-bit data accesses.
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Only needed if
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.Va WDC_CAPABILITY_DATA32
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is set in the controller's
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.Va wdc_softc .
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.El
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.Pp
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.Va ch_queue
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can point to a common
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.Va struct channel_queue
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if the controller doesn't support concurrent access to its different channels.
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If all channels are independent, it is recommended that each channel has
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its own
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.Va ch_queue
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(for better performance).
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.Pp
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The bus-specific front-end can use the
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.Fn wdcprobe
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function, with a properly initialised
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.Va struct channel_softc
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as argument (
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.Va wdc
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can be set to NULL.
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This allows
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.Fn wdcprobe
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to be easily used in bus front-end probe functions).
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This function will return an integer where bit 0 will be set if the master
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device has been found, and 1 if the slave device has been found.
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.Pp
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The bus-specific attach function has to call
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.Fn wdcattach
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for each channel, with a pointer to a properly initialised
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.Va channel softc
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as argument.
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This will probe devices attached to the IDE channel and attach them.
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Once this function returns, the
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.Va ch_drive
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array of the
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.Va channel_softc
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will contain the drive's capabilities.
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This can be used to properly initialise the controller's mode, or disable a
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channel without drives.
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.Pp
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The elements of interest in
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.Va ata_drive_datas
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for a bus front-end are:
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.Bl -tag -compact -width "dma_finish" -offset "xxxx"
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.It drive
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The drive number
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.It drive_flags
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Flags indicating the drive capabilities.
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A null
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.Va drive_flags
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indicate either that no drive is here, or that no driver was
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found for this device.
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.It PIO_mode, DMA_mode, UDMA_mode
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the highest supported modes for this drive compatible with the controller's
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capabilities.
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Needs to be reset to the mode to use by the drive, if known.
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.It drv_softc
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A pointer to the drive's softc.
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Can be used to print the drive's name.
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.El
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.Pp
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.Va drive_flags
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handles the following flags:
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.Bl -tag -compact -width "dma_finish" -offset "xxxx"
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.It DRIVE_ATA, DRIVE_ATAPI
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Gives the drive type, if any.
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The shortcut DRIVE can be used to just test the presence/absence of a drive.
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.It DRIVE_CAP32
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This drive works with 32-bit data I/O.
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.It DRIVE_DMA
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This drive supports DMA.
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.It DRIVE_UDMA
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This drive supports Ultra-DMA.
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.It DRIVE_MODE
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This drive properly reported its PIO and DMA mode.
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.El
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.Pp
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Once the controller has been initialised, it has to reset the
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.Va DRIVE_DMA
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and
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.Va DRIVE_UDMA ,
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as well as the values of
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.Va PIO_mode ,
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.Va DMA_mode
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and
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.Va UDMA_mode
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if the modes to be used are not highest ones supported by the drive.
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.Sh SEE ALSO
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.Xr wdc 4 ,
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.Xr bus_space 9
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.Sh CODE REFERENCES
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The wdc core functions are implemented in
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.Pa sys/dev/ic/wdc.c .
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Low-level ATA and ATAPI support is provided by
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.Pa sys/dev/ata_wdc.c
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and
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.Pa sys/dev/scsipi/atapi_wdc.c
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respectively.
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.Pp
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An example of a simple bus front-end can be found in
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.Pa sys/dev/isapnp/wdc_isapnp.c .
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A more complex one, with multiple channels and bus-master DMA support is
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.Pa sys/dev/pci/pciide.c .
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.Pa sys/arch/atari/dev/wdc_mb.c
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makes use of hardware locking, and also provides an example of bus-front
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end for a big-endian system, which needs byte-swapping bus_space functions.
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