257 lines
7.5 KiB
C
257 lines
7.5 KiB
C
/* $NetBSD: wdc_spd.c,v 1.1 2001/10/16 15:38:35 uch Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by UCHIYAMA Yasushi.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#define __read_1(a) \
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({ \
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u_int32_t a_ = (a); \
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u_int8_t r = (*(__volatile__ u_int8_t *)a_); \
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\
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if (a_ == 0xb400004e) /* (wdc)STAT LED off */ \
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SPD_LED_OFF(); \
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\
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(r); \
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})
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#define __write_1(a, v) \
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{ \
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u_int32_t a_ = (a); \
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(*(__volatile__ u_int8_t *)a_) = (v); \
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\
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if (a_ == 0xb400004e) /* (wdc)CMD LED on */ \
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SPD_LED_ON(); \
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}
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#define _PLAYSTATION2_BUS_SPACE_PRIVATE
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#include <machine/bus.h>
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#include <dev/ata/atavar.h>
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#include <dev/ic/wdcvar.h>
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#include <playstation2/ee/eevar.h>
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#include <playstation2/dev/spdvar.h>
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#include <playstation2/dev/spdreg.h>
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#define WDC_SPD_HDD_AUXREG_OFFSET 0x1c
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struct wdc_spd_softc {
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struct wdc_softc sc_wdcdev;
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struct channel_softc *wdc_chanptr;
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struct channel_softc wdc_channel;
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void *sc_ih;
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};
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#ifdef DEBUG
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#define STATIC
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#else
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#define STATIC static
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#endif
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STATIC int wdc_spd_match(struct device *, struct cfdata *, void *);
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STATIC void wdc_spd_attach(struct device *, struct device *, void *);
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struct cfattach wdc_spd_ca = {
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sizeof (struct wdc_spd_softc), wdc_spd_match, wdc_spd_attach
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};
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extern struct cfdriver wdc_cd;
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STATIC void __wdc_spd_enable(void);
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STATIC void __wdc_spd_disable(void) __attribute__((__unused__));
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STATIC void __wdc_spd_bus_space(struct channel_softc *);
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/*
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* wdc register is 16 bit wide.
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*/
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#define VADDR(h, o) ((h) + ((o) << 1))
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_BUS_SPACE_READ(_wdc_spd, 1, 8)
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_BUS_SPACE_READ(_wdc_spd, 2, 16)
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_BUS_SPACE_READ_MULTI(_wdc_spd, 1, 8)
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_BUS_SPACE_READ_MULTI(_wdc_spd, 2, 16)
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_BUS_SPACE_READ_REGION(_wdc_spd, 1, 8)
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_BUS_SPACE_READ_REGION(_wdc_spd, 2, 16)
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_BUS_SPACE_WRITE(_wdc_spd, 1, 8)
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_BUS_SPACE_WRITE(_wdc_spd, 2, 16)
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_BUS_SPACE_WRITE_MULTI(_wdc_spd, 1, 8)
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_BUS_SPACE_WRITE_MULTI(_wdc_spd, 2, 16)
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_BUS_SPACE_WRITE_REGION(_wdc_spd, 1, 8)
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_BUS_SPACE_WRITE_REGION(_wdc_spd, 2, 16)
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_BUS_SPACE_SET_MULTI(_wdc_spd, 1, 8)
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_BUS_SPACE_SET_MULTI(_wdc_spd, 2, 16)
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_BUS_SPACE_SET_REGION(_wdc_spd, 1, 8)
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_BUS_SPACE_SET_REGION(_wdc_spd, 2, 16)
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_BUS_SPACE_COPY_REGION(_wdc_spd, 1, 8)
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_BUS_SPACE_COPY_REGION(_wdc_spd, 2, 16)
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#undef VADDR
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STATIC const struct playstation2_bus_space _wdc_spd_space = {
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pbs_map : _BUS_SPACE_NO_MAP,
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pbs_unmap : _BUS_SPACE_NO_UNMAP,
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pbs_subregion : _BUS_SPACE_NO_SUBREGION,
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pbs_alloc : _BUS_SPACE_NO_ALLOC,
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pbs_free : _BUS_SPACE_NO_FREE,
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pbs_vaddr : _BUS_SPACE_NO_VADDR,
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pbs_r_1 : _wdc_spd_read_1,
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pbs_r_2 : _wdc_spd_read_2,
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pbs_r_4 : _BUS_SPACE_NO_READ(4, 32),
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pbs_r_8 : _BUS_SPACE_NO_READ(8, 64),
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pbs_rm_1 : _wdc_spd_read_multi_1,
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pbs_rm_2 : _wdc_spd_read_multi_2,
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pbs_rm_4 : _BUS_SPACE_NO_READ_MULTI(4, 32),
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pbs_rm_8 : _BUS_SPACE_NO_READ_MULTI(8, 64),
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pbs_rr_1 : _wdc_spd_read_region_1,
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pbs_rr_2 : _wdc_spd_read_region_2,
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pbs_rr_4 : _BUS_SPACE_NO_READ_REGION(4, 32),
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pbs_rr_8 : _BUS_SPACE_NO_READ_REGION(8, 64),
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pbs_w_1 : _wdc_spd_write_1,
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pbs_w_2 : _wdc_spd_write_2,
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pbs_w_4 : _BUS_SPACE_NO_WRITE(4, 32),
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pbs_w_8 : _BUS_SPACE_NO_WRITE(8, 64),
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pbs_wm_1 : _wdc_spd_write_multi_1,
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pbs_wm_2 : _wdc_spd_write_multi_2,
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pbs_wm_4 : _BUS_SPACE_NO_WRITE_MULTI(4, 32),
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pbs_wm_8 : _BUS_SPACE_NO_WRITE_MULTI(8, 64),
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pbs_wr_1 : _wdc_spd_write_region_1,
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pbs_wr_2 : _wdc_spd_write_region_2,
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pbs_wr_4 : _BUS_SPACE_NO_WRITE_REGION(4, 32),
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pbs_wr_8 : _BUS_SPACE_NO_WRITE_REGION(8, 64),
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pbs_sm_1 : _wdc_spd_set_multi_1,
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pbs_sm_2 : _wdc_spd_set_multi_2,
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pbs_sm_4 : _BUS_SPACE_NO_SET_MULTI(4, 32),
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pbs_sm_8 : _BUS_SPACE_NO_SET_MULTI(8, 64),
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pbs_sr_1 : _wdc_spd_set_region_1,
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pbs_sr_2 : _wdc_spd_set_region_2,
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pbs_sr_4 : _BUS_SPACE_NO_SET_REGION(4, 32),
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pbs_sr_8 : _BUS_SPACE_NO_SET_REGION(8, 64),
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pbs_c_1 : _wdc_spd_copy_region_1,
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pbs_c_2 : _wdc_spd_copy_region_2,
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pbs_c_4 : _BUS_SPACE_NO_COPY_REGION(4, 32),
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pbs_c_8 : _BUS_SPACE_NO_COPY_REGION(8, 64),
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};
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int
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wdc_spd_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct spd_attach_args *spa = aux;
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struct channel_softc ch;
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int i, result;
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if (spa->spa_slot != SPD_HDD)
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return (0);
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memset(&ch, 0, sizeof(ch));
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__wdc_spd_bus_space(&ch);
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for (i = 0, result = 0; i < 8; i++) { /* 8 sec */
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if (result == 0)
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result = wdcprobe(&ch);
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delay(1000000);
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}
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return (result);
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}
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void
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wdc_spd_attach(struct device *parent, struct device *self, void *aux)
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{
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struct spd_attach_args *spa = aux;
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struct wdc_spd_softc *sc = (void *)self;
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struct wdc_softc *wdc = &sc->sc_wdcdev;
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struct channel_softc *ch = &sc->wdc_channel;
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printf(": %s\n", spa->spa_product_name);
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__wdc_spd_bus_space(ch);
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wdc->cap =
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WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA | WDC_CAPABILITY_DATA16;
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wdc->PIO_cap = 0;
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sc->wdc_chanptr = &sc->wdc_channel;
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wdc->channels = &sc->wdc_chanptr;
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wdc->nchannels = 1;
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ch->channel = 0;
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ch->wdc = &sc->sc_wdcdev;
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ch->ch_queue = malloc(sizeof(struct channel_queue), M_DEVBUF,
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M_NOWAIT);
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if (ch->ch_queue == NULL) {
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printf("%s: can't allocate memory for command queue",
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wdc->sc_dev.dv_xname);
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return;
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}
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spd_intr_establish(SPD_HDD, wdcintr, &sc->wdc_channel);
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__wdc_spd_enable();
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wdcattach(&sc->wdc_channel);
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}
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void
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__wdc_spd_bus_space(struct channel_softc *ch)
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{
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ch->cmd_iot = &_wdc_spd_space;
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ch->cmd_ioh = SPD_HDD_IO_BASE;
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ch->ctl_iot = &_wdc_spd_space;
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ch->ctl_ioh = SPD_HDD_IO_BASE + WDC_SPD_HDD_AUXREG_OFFSET;
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ch->data32iot = ch->cmd_iot;
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ch->data32ioh = ch->cmd_ioh;
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}
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void
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__wdc_spd_enable()
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{
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u_int16_t r;
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r = _reg_read_2(SPD_INTR_ENABLE_REG16);
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r |= SPD_INTR_HDD;
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_reg_write_2(SPD_INTR_ENABLE_REG16, r);
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}
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void
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__wdc_spd_disable()
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{
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u_int16_t r;
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r = _reg_read_2(SPD_INTR_ENABLE_REG16);
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r &= ~SPD_INTR_HDD;
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_reg_write_2(SPD_INTR_ENABLE_REG16, r);
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}
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