211 lines
7.2 KiB
C
211 lines
7.2 KiB
C
/* $NetBSD: frame.h,v 1.6 2002/09/28 11:03:08 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* SH-5 Stack Frame Layouts
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*/
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#ifndef _SH5_FRAME_H_
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#define _SH5_FRAME_H_
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#include <sys/signal.h>
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/*
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* All exception frames contain a state frame which is a snapshot of the
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* exception-specific control registers at the time of the exception.
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*/
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struct stateframe {
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register_t sf_flags; /* See below */
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register_t sf_ssr; /* Saved Status Register */
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register_t sf_spc; /* Saved Program Counter */
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register_t sf_expevt; /* EXPEVT Control Register */
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register_t sf_intevt; /* INTEVT Control Register */
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register_t sf_tea; /* TEA Control Register */
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register_t sf_tra; /* TRA Control Register */
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register_t sf_usr; /* User Status Register */
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};
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#define SF_FLAGS_CALLEE_SAVED 0x1 /* Frame contains callee-saved regs */
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/*
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* SH5 ABI Callee-saved registers.
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*
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* Note: See comments in <sh5/sh5/exception.S> as to why r10-r14 are NOT
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* part of the Caller-Saved set.
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*/
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struct exc_calleesave {
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register_t r28; register_t r29; register_t r30; register_t r31;
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register_t r32; register_t r33; register_t r34; register_t r35;
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register_t r44; register_t r45; register_t r46; register_t r47;
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register_t r48; register_t r49; register_t r50; register_t r51;
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register_t r52; register_t r53; register_t r54; register_t r55;
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register_t r56; register_t r57; register_t r58; register_t r59;
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register_t tr5; register_t tr6; register_t tr7;
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};
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/*
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* SH5 ABI Caller-saved registers
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*
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* Note: See comments in <sh5/sh5/exception.S> as to why r10-r14 are
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* part of the Caller-Saved set.
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*/
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struct exc_callersave {
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register_t r0; register_t r1; register_t r2; register_t r3;
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register_t r4; register_t r5; register_t r6; register_t r7;
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register_t r8; register_t r9;
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register_t r10; register_t r11; register_t r12; register_t r13;
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register_t r14;
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register_t r15; register_t r16; register_t r17; register_t r18;
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register_t r19; register_t r20; register_t r21; register_t r22;
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register_t r23;
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register_t r25; register_t r26; register_t r27;
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register_t r36; register_t r37; register_t r38; register_t r39;
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register_t r40; register_t r41; register_t r42; register_t r43;
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register_t r60; register_t r61; register_t r62;
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register_t tr0; register_t tr1; register_t tr2; register_t tr3;
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register_t tr4;
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};
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/*
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* Interrupt (asynchronous) exception frames contain a stateframe and
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* only the caller-saved register set. This reduces the size of the
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* frame to save both time and stack space during interrupt dispatch.
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* The latter being particularly important when interrupts can nest
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* up to 15 levels deep...
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*
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* The low-level exception handling code is able to grow these into
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* full-blown trapframes (below) if necessary.
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*
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* Note: DO NOT change this structure unless you *really* understand
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* what happens in exception.S
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*/
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struct intrframe {
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struct stateframe if_state; /* Machine state */
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struct exc_callersave if_caller; /* Caller-saved registers */
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};
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/*
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* Synchronous exception frames contain the same state as the interrupt
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* frame, above, with the addition of Callee-saved registers. This
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* provides a complete snapshot of the machine state at the point where
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* the exception happened.
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*
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* Note: DO NOT change this structure unless you *really* understand
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* what happens in exception.S
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*/
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struct trapframe {
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struct exc_calleesave tf_callee; /* Callee-saved registers */
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struct intrframe tf_ifr; /* Caller-saved/Machine state */
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};
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/* Convenience macroes for accessing caller-saved registers & machine state */
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#define tf_state tf_ifr.if_state
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#define tf_caller tf_ifr.if_caller
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#define USERMODE(tf) (((tf)->tf_state.sf_ssr & SH5_CONREG_SR_MD) == 0)
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/*
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* Floating point state is saved in the following structure
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*
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* Note that the set of FP registers actually saved in here is controlled
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* by the FPRS bits of the USR register, saved in switchframe->sf_usr.
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*/
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struct fpregs {
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u_int32_t fpscr;
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u_int32_t pad;
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register_t fp[32];
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};
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/*
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* A switchframe is used by cpu_switch() to save and restore a process'
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* kernel context.
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* This consists of the callee-saved register set, the current kernel
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* stack pointer, the program counter, and the status register.
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*
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* Note that due to ABI issues, r10-r13 are not part of exc_calleesave.
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* However, we still have to save/restore them on a context switch.
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*/
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struct switchframe {
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register_t sf_pc; /* Saved program counter */
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register_t sf_sr; /* Status register */
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register_t sf_sp; /* Kernel stack pointer */
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register_t sf_fp; /* Kernel frame pointer */
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register_t sf_r10;
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register_t sf_r11;
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register_t sf_r12;
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register_t sf_r13;
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struct exc_calleesave sf_regs; /* Saved registers */
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struct fpregs sf_fpregs;
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};
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/*
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* Exception handling requires a per-cpu scratch frame with the
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* following contents.
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*/
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struct exc_scratch_frame {
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register_t es_critical; /* Non-zero if valid contents */
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register_t es_usr; /* Saved user status register */
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register_t es_r[3]; /* Saved r0-r2 */
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register_t es_r15; /* Saved r15 */
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register_t es_tr0; /* Saved tr0 */
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register_t es_expevt; /* Saved expevt */
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register_t es_intevt; /* Saved intevt */
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register_t es_tea; /* Saved tea */
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register_t es_tra; /* Saved tra */
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register_t es_spc; /* Saved PC */
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register_t es_ssr; /* Saved SR */
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};
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/*
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* TLB Miss handling requires a per-cpu scratch frame/stack with the
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* following contents.
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*/
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struct tlb_scratch_frame {
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register_t ts_r[7]; /* Saved r0 - r6 */
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register_t ts_tr[2]; /* Saved tr0 - tr1 */
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char ts_stack[1024]; /* TLB Stack */
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};
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#endif /* _SH5_FRAME_H_ */
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